t3
nDIR
nSTEP
t4
t1
t2
t5
nDS0-1
t6
nINDEX
t7
nRDATA
t8
nWDATA
nIOW
t9
t9
nDS0-1,
nMTR0-1
Parameter
t1 nDIR Set Up to nSTEP Low
t2 nSTEP Active Time Low
t3 nDIR Hold Time After nSTEP
t4 nSTEP Cycle Time
t5 nDS0-1 Hold Time from nSTEP Low
t6 nINDEX Pulse Width
t7 nRDATA Active Time Low
t8 nWDATA Write Data Width Low
t9 nDS0-1, MTR0-1 from End of nIOW
min
typ
max
units
4
X*
24
X*
96
X*
132
X*
20
X*
2
X*
40
ns
.5
Y*
25
ns
*X specifies one MCLK period and Y specifies one WCLK period.
MCLK = Controller Clock to FDC (See Table 6).
WCLK = 2 x Data Rate (See Table 6).
FIGURE 7 - DISK DRIVE TIMING
79