AT91SAM9G46B-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT91SAM9G46B-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

Table 48-48. USART SPI Timings with 1.8V Peripheral Supply

Symbol

Parameter

Conditions

Min

Max

Unit

SPI0

SPCK Period

–

–

ns

SPI1

Input Data Setup Time

20.6

–

ns

SPI2

SPI3

Input Data Hold Time

Chip Select Active to Serial Clock

0

Master Mode

–

–

ns

6.0

ns

SPI4

Output Data Setup Time

–

0.2

ns

SPI5

Serial Clock to Chip Select Inactive

–

0

ns

SPI6

SPCK falling to MISO

4.4(1)

20.7(1)

ns

SPI7

MOSI Setup time before SPCK rises

7.6

–

ns

SPI8

MOSI Hold time after SPCK rises

3.1

–

ns

SPI9

SPCK rising to MISO

5.6(1)

20.6(1)

ns

SPI10

MOSI Setup time before SPCK falls

0.8

–

ns

SPI11

MOSI Hold time after SPCK falls

Slave Mode

0

–

ns

SPI12

NPCS0 setup to SPCK rising

10.2

–

ns

SPI13

NPCS0 hold after SPCK falling

1.9

–

ns

SPI14

NPCS0 setup to SPCK falling

11.0

–

ns

SPI15

NPCS0 hold after SPCK rising

2.2

–

ns

SPI16

NPCS0 falling to MISO valid

–

18.9

ns

Notes: 1. For output signals, Min and Max access time must be extracted. The Min access time is the time between the SPCK rising

or falling edge and the signal change. The Max access time is the time between the SPCK rising or falling edge and the

signal stabilization. Figure 48-11 illustrates Min and Max accesses for SPI2. The same applies to SPI5, SPI6, and SPI9.

1242 SAM9G46 Series [DATASHEET]

Atmel-11028G-ATARM-SAM9G46-Datasheet_08-Dec-15

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