ZPSD311-B-90UI View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ZPSD311-B-90UI Datasheet PDF : 85 Pages
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PSD3XX Family
Figure 21. Timing of 8-Bit Multiplexed Address/Data Bus Using RD, WR (PSD3X2/3X3)
READ CYCLE
WRITE CYCLE
CSI/A19
as CSI
Direct (1)
PAD Input
32
7
STABLE INPUT
6
32
15
32
STABLE INPUT
14
Multiplexed (2)
Inputs
t(s) A0/AD0-
A7/AD7
duc Active High
ro ) ALE
te P ct(s Active Low
le u ALE
bso Prod RD/E/DS as RD
) - O lete BHE/PSEN
t(s so as PSEN
uc Ob WR/VPP or
d - RW as WR
Pro t(s) Any of
PA0-PA7
te c as I/O Pin
le du Any of
so ro PB0-PB7
b P as I/O Pin
O te Any of
le PA0-PA7 Pins
as Address
ObsoOutputs
6
ADDRESS A
2
3
1
10
DATA VALID
9
4
13
8
12
5
18
19
INPUT
INPUT
23
ADDRESS A
14
ADDRESS B
2
3
1
11
DATA
IN
17
16
36
13
12A
20
OUTPUT
OUTPUT
23
ADDRESS B
See referenced notes on page 64
45
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