DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

DHQ1ECCSECETS1SR1WH

Intel® Quark SoC X1000

Intel 

Legacy Bridge—Intel® Quark SoC X1000

Bit

Default &

Range Access

Description

23:12

11:0

0b

RW/L

0b

RW/L

Protected Range Limit (PRL): This field corresponds to SPI address bits 23:12 and

specifies the upper limit of the protected range. Address bits 11:0 are assumed to be

FFFh for the limit comparison. Any address greater than the value programmed in this

field is unaffected by this protected range.

Protected Range Base (PRB): This field corresponds to SPI address bits 23:12 and

specifies the lower base of the protected range. Address bits 11:0 are assumed to be

000h for the base comparison. Any address less than the value programmed in this field

is unaffected by this protected range.

October 2013

Document Number: 329676-001US

Intel® Quark SoC X1000

DS

857

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