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PIC24HJ128GP802-I/ML View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC24HJ128GP802-I/ML
Microchip
Microchip Technology 
PIC24HJ128GP802-I/ML Datasheet PDF : 357 Pages
First Prev 231 232 233 234 235 236 237 238 239 240 Next Last
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
REGISTER 20-7: AD1CSSL: ADC1 INPUT SCAN SELECT REGISTER LOW(1,2)
U-0
bit 15
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
CSS12
CSS11
CSS10
CSS9
R/W-0
CSS8
bit 8
R/W-0
CSS7
bit 7
R/W-0
CSS6
R/W-0
CSS5
R/W-0
CSS4
R/W-0
CSS3
R/W-0
CSS2
R/W-0
CSS1
R/W-0
CSS0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
bit 12-0
Unimplemented: Read as ‘0
CSS<12:0>: ADC Input Scan Selection bits
1 = Select ANx for input scan
0 = Skip ANx for input scan
Note 1: On devices without 13 analog inputs, all AD1CSSL bits can be selected by user application. However,
inputs selected for scan without a corresponding input on device converts VREF-.
2: CSSx = ANx, where x = 0 through 12.
REGISTER 20-8: AD1PCFGL: ADC1 PORT CONFIGURATION REGISTER LOW(1,2,3)
U-0
bit 15
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
PCFG12 PCFG11
PCFG10
PCFG9
R/W-0
PCFG8
bit 8
R/W-0
PCFG7
bit 7
R/W-0
PCFG6
R/W-0
PCFG5
R/W-0
PCFG4
R/W-0
PCFG3
R/W-0
PCFG2
R/W-0
PCFG1
R/W-0
PCFG0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
bit 12-0
Unimplemented: Read as ‘0
PCFG<12:0>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexor connected to AVSS
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
Note 1: On devices without 13 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on device.
2: PCFGx = ANx, where x = 0 through 12.
3: PCFGX bits have no effect if ADC module is disabled by setting ADXMD bit in the PMDX register. In this
case, all port pins multiplexed with ANX will be in Digital mode.
DS70293D-page 232
Preliminary
© 2009 Microchip Technology Inc.

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