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ST7PLIT115BF1M3 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ST7PLIT115BF1M3 Datasheet PDF : 159 Pages
First Prev 141 142 143 144 145 146 147 148 149 150 Next Last
ADC CHARACTERISTICS (Cont’d)
Figure 112. ADC Accuracy Characteristics with amplifier enabled
ST7LITE1xB
Digital Result ADCDR
704
1LSBIDEAL
=
V-----D-----D----------V----S-----S--
1024
(2)
ET
EO
EL
108
1 LSBIDEAL
0
1234567
VSS62.5mV
EG
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
(3)
(1)
ED
ET=Total Unadjusted Error: maximum deviation
between the actual and the ideal transfer curves.
EO=Offset Error: deviation between the first actual
transition and the first ideal one.
EG=Gain Error: deviation between the last ideal
transition and the last actual one.
ED=Differential Linearity Error: maximum deviation
between actual steps and the ideal one.
EL=Integral Linearity Error: maximum deviation
between any actual transition and the end point
correlation line.
701 702 703 704
430mV
Vin (LSBIDEAL)
Vin (OPAMP)
Note:
1. When the AMPSEL bit in the ADCDRL register is set, it is mandatory that fADC be less than or equal to 2 MHz. (if
fCPU=8MHz. then SPEED=0, SLOW=1).
Vout (ADC input)
Vmax
Vmin
0V
Noise
430mV
Vin
(OPAMP input)
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