PIC18F65K80T-I/SS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F65K80T-I/SS

28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

Microchip Technology 

PIC18F66K80 FAMILY

REGISTER 27-54: BRGCON3: BAUD RATE CONTROL REGISTER 3

R/W-0

R/W-0

U-0

U-0

U-0

R/W-0

R/W-0

R/W-0

WAKDIS

WAKFIL

—

—

—

SEG2PH2(1) SEG2PH1(1) SEG2PH0(1)

bit 7

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

bit 6

bit 5-3

bit 2-0

WAKDIS: Wake-up Disable bit

1 = Disable CAN bus activity wake-up feature

0 = Enable CAN bus activity wake-up feature

WAKFIL: Selects CAN bus Line Filter for Wake-up bit

1 = Use CAN bus line filter for wake-up

0 = CAN bus line filter is not used for wake-up

Unimplemented: Read as ‘0’

SEG2PH<2:0>: Phase Segment 2 Time Select bits(1)

111 = Phase Segment 2 time = 8 x TQ

110 = Phase Segment 2 time = 7 x TQ

101 = Phase Segment 2 time = 6 x TQ

100 = Phase Segment 2 time = 5 x TQ

011 = Phase Segment 2 time = 4 x TQ

010 = Phase Segment 2 time = 3 x TQ

001 = Phase Segment 2 time = 2 x TQ

000 = Phase Segment 2 time = 1 x TQ

Note 1: These bits are ignored if SEG2PHTS bit (BRGCON2<7>) is ‘0’.

DS39977F-page 432

 2010-2012 Microchip Technology Inc.

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