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AM28F512-70FIB View Datasheet(PDF) - Advanced Micro Devices

Part Name
Description
Manufacturer
AM28F512-70FIB Datasheet PDF : 35 Pages
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AC Characteristics—Write/Erase/Program Operations
Parameter Symbols
Am28F512 Speed Options
JEDEC
Standard
Parameter Description
-70 -90 -120 -150 -200 Unit
tAVAV
tAVWL
tWLAX
tDVWH
tWHDX
tWHGL
tGHWL
tELWL
tWHEH
tWLWH
tWHWL
tWHWH1
tWC
Write Cycle Time (Note 4)
tAS
Address Setup Time
tAH
Address Hold Time
tDS
Data Setup Time
tDH
Data Hold Time
tWR
Write Recovery Time before Read
Read Recovery Time before Write
Min
70
90 120 150 200 ns
Min
0
0
0
0
0
ns
Min
45
45
50
60
75
ns
Min
45
45
50
50
50
ns
Min
10
10
10
10
10
ns
Min
6
6
6
6
6
µs
Min
0
0
0
0
0
µs
tCS
Chip Enable Setup Time
Min
0
0
0
0
0
ns
tCH
Chip Enable Hold Time
Min
0
0
0
0
0
ns
tWP
Write Pulse Width
Min
45
45
50
60
60
ns
tWPH
Write Pulse Width HIGH
Min
20
20
20
20
20
ns
Duration of Programming Operation
(Note 2)
Min
10
10
10
10
10
µs
tWHWH2
tVPEL
Duration of Erase Operation (Note 2) Min 9.5 9.5 9.5 9.5 9.5 ms
VPP Setup Time to Chip Enable LOW
(Note 4)
Min
100 100 100 100 100
ns
tVCS
VCC Setup Time to Chip Enable LOW
(Note 4)
Min
50
50
50
50
50
µs
tVPPR
tVPPF
tLKO
VPP Rise Time 90% VPPH (Note 4)
VPP Fall Time 10% VPPL (Note 4)
VCC < VLKO to Reset (Note 4)
Min 500 500 500 500 500 ns
Min 500 500 500 500 500 ns
Min 100 100 100 100 100 ns
Notes:
1. Read timing characteristics during read/write operations are the same as during read-only operations. Refer to AC
Characteristics for Read Only operations.
2. Maximum pulse widths not required because the on-chip program/erase stop timer will terminate the pulse widths internally
on the device.
3. Chip-Enable Controlled Writes: Write operations are driven by the valid combination of Chip-Enable and Write-Enable. In
systems where Chip-Enable defines the Write Pulse Width (within a longer Write-Enable timing waveform) all setup, hold and
inactive Write-Enable times should be measured relative to the Chip-Enable waveform.
4. Not 100% tested.
Am28F512
27

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