74VHC125(2024) - Quad Buffer with 3-STATE Outputs - ON-Semiconductor Datasheet

General Description
   The VHC125 contains four independent non−inverting buffers with 3−STATE outputs. It is an advanced high−speed CMOS device fabricated with silicon gate CMOS technology and achieves the high−speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

FEATUREs
• High Speed: tPD = 3.8 ns (Typ.) at VCC = 5 V
• Low Power Dissipation: ICC = 4 μA (Max.) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC (Min.)
• Power Down Protection is Provided on All Inputs
• Low Noise: VOLP = 0.8 V (Max.)
• Pin and Function Compatible with 74HC125
• Pb−Free, Halogen Free/BFR Free and RoHS Compliant