C8051F045 データシートの表示（PDF） - Silicon Laboratories

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C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

SFR Definition 12.16. EIP2: Extended Interrupt Priority 2

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

-

EP1

PX7 PADC2 PWADC2 PT4 PADC0

PT3 00000000

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

SFR Address: 0xF7

SFR Page: All Pages

Bit7:

Bit6:

Bit5:

Bit4:

Bit3:

Bit2:

Bit1:

Bit0:

Reserved.

EP1: UART1 Interrupt Priority Control.

This bit sets the priority of the UART1 interrupt.

0: UART1 interrupt set to low level.

1: UART1 interrupt set to high level.

PCAN0: CAN Interrupt Priority Control.

This bit sets the priority of the CAN Interrupt.

0: CAN Interrupt set to low priority level.

1: CAN Interrupt set to high priority level.

PADC2: ADC2 End Of Conversion Interrupt Priority Control (C8051F040/1/2/3 only).

This bit sets the priority of the ADC2 End of Conversion interrupt.

0: ADC2 End of Conversion interrupt set to low level.

1: ADC2 End of Conversion interrupt set to low level.

PWADC2: ADC2 Window Comparator Interrupt Priority Control (C8051F040/1/2/3 only).

0: ADC2 Window interrupt set to low level.

1: ADC2 Window interrupt set to high level.

PT4: Timer 4 Interrupt Priority Control.

This bit sets the priority of the Timer 4 interrupt.

0: Timer 4 interrupt set to low level.

1: Timer 4 interrupt set to low level.

PADC0: ADC End of Conversion Interrupt Priority Control.

This bit sets the priority of the ADC0 End of Conversion Interrupt.

0: ADC0 End of Conversion interrupt set to low priority level.

1: ADC0 End of Conversion interrupt set to high priority level.

PT3: Timer 3 Interrupt Priority Control.

This bit sets the priority of the Timer 3 interrupts.

0: Timer 3 interrupt set to low priority level.

1: Timer 3 interrupt set to high priority level.

162

Rev. 1.5

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