GL811USB 데이터 시트보기 (PDF) - Genesys Logic

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GL811USB

USB 2.0 to ATA / ATAPI Bridge Controller

Genesys Logic 

GL811USB – USB 2.0 to ATA / ATAPI Bridge Controller

6.4.2.4 Host terminating a Multiword DMA data burst

CS0_/ CS1_

DMARQ

(Note2)

DMACK_

(Note1)

DIOR_/DIOW_

Read DD(15:0)

Write DD(15:0)

tN

t0

tK

tD

tJ

tE

tZ

tG tF

tG

tH

Note:

1.To terminate the transmission of a data burst, the Host shall negate DMACK_ within the

specified time after a DIOR_ or DIOW_ pulse. No further DIOR_ or DIOW_ pulses shall be

asserted for this burst.

2.If the device is able to continue the transfer of data, the device may leave DMARQ asserted

and wait for the host to reassert DMACK_ or may negate DMARQ at any time after detecting

that DMACK_ has been negated.

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