PIC16F753-I/SLQTP 데이터 시트보기 (PDF) - Microchip Technology

부품명

상세내역

제조사

PIC16F753-I/SLQTP

14/16-Pin, Flash-Based 8-Bit CMOS Microcontrollers

Microchip Technology 

PIC16F753/HV753

FIGURE 19-8:

INT PIN INTERRUPT TIMING

CLKIN

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

CLKOUT (3)

(4)

INT pin

INTF flag

(1)

(INTCON reg.)

(1)

(5)

GIE bit

(INTCON reg.)

Interrupt Latency (2)

INSTRUCTION FLOW

PC

PC

Instruction

Fetched

Inst (PC)

PC + 1

Inst (PC + 1)

PC + 1

—

0004h

Inst (0004h)

0005h

Inst (0005h)

Instruction

Executed

Inst (PC – 1)

Inst (PC)

Dummy Cycle

Dummy Cycle

Inst (0004h)

Note 1: INTF flag is sampled here (every Q1).

2: Asynchronous interrupt latency = 3-4 TCY. Synchronous latency = 3 TCY, where TCY = instruction cycle time. Latency

is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.

3: CLKOUT is available only in INTOSC and RC Oscillator modes.

4: For minimum width of INT pulse, refer to AC specifications in Section 22.0 “Electrical Specifications”.

5: INTF is enabled to be set any time during the Q4-Q1 cycles.

TABLE 19-6: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS

Name Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Register on

Page

INTCON GIE

PEIE

T0IE

INTE

IOCIE

T0IF

INTF

IOCIF

19

IOCAF

—

—

IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0

49

IOCAN

—

—

IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0

49

IOCAP

—

—

IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0

49

LATA

—

—

LATA5 LATA4

—

LATA2 LATA1 LATA0

46

PIE1 TMR1GIE ADIE

—

— HLTMR2IE HLTMR1IE TMR2IE TMR1IE

20

PIR1 TMR1GIF ADIF

—

—

HLTMR2IF HLTMR1IF TMR2IF TMR1IF

22

Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition.

Shaded cells are not used by the interrupt module.

 2013 Microchip Technology Inc.

Preliminary

DS40001709A-page 173

Share Link: