PIC18F45J50-I/SOSQTP 데이터 시트보기 (PDF) - Microchip Technology

부품명

상세내역

제조사

PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

MOVLW

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

Move Literal to W

MOVLW k

0  k  255

kW

None

0000 1110 kkkk kkkk

The eight-bit literal, ‘k’, is loaded into W.

1

1

Q2

Read

literal ‘k’

Q3

Process

Data

Q4

Write to

W

Example:

MOVLW

After Instruction

W

= 5Ah

0x5A

MOVWF

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

Move W to f

MOVWF f {,a}

0  f  255

a  [0,1]

(W)  f

None

0110 111a ffff ffff

Move data from W to register, ‘f’.

Location ‘f’ can be anywhere in the

256-byte bank.

If ‘a’ is ‘0’, the Access Bank is selected.

If ‘a’ is ‘1’, the BSR is used to select the

GPR bank (default).

If ‘a’ is ‘0’ and the extended instruction

set is enabled, this instruction operates

in Indexed Literal Offset Addressing

mode whenever f 95 (5Fh). See

Section 28.2.3 “Byte-Oriented and

Bit-Oriented Instructions in Indexed

Literal Offset Mode” for details.

1

1

Q2

Read

register ‘f’

Q3

Process

Data

Q4

Write

register ‘f’

Example:

MOVWF

Before Instruction

W

REG

= 4Fh

= FFh

After Instruction

W

REG

= 4Fh

= 4Fh

REG, 0

 2011 Microchip Technology Inc.

DS39931D-page 461

Share Link: