DSPIC33FJ32GP802-I/SP 데이터 시트보기 (PDF) - Microchip Technology

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DSPIC33FJ32GP802-I/SP

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

REGISTER 22-1: DAC1CON: DAC CONTROL REGISTER

R/W-0

U-0

R/W-0

R/W-0

U-0

U-0

DACEN

—

DACSIDL AMPON

—

—

bit 15

U-0

R/W-0

—

FORM

bit 8

U-0

—

bit 7

R/W-0

R/W-0

R/W-0

R/W-0

R/W-1

DACFDIV<6:0>

R/W-0

R/W-1

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

bit 14

bit 13

bit 12

bit 11-9

bit 8

bit 7

bit 6-0

DACEN: DAC1 Enable bit

1 = Enables module

0 = Disables module

Unimplemented: Read as ‘0’

DACSIDL: Stop in Ideal Mode bit

1 = Discontinue module operation when device enters Idle mode

0 = Continue module operation in Idle mode

AMPON: Enable Analog Output Amplifier in Sleep Mode/Stop-in Idle Mode

1 = Analog Output Amplifier is enabled during Sleep Mode/Stop-in Idle mode

0 = Analog Output Amplifier is disabled during Sleep Mode/Stop-in Idle mode

Unimplemented: Read as ‘0’

FORM: Data Format Select bit

1 = Signed integer

0 = Unsigned integer

Unimplemented: Read as ‘0’

DACFDIV<6:0>: DAC Clock Divider

1111111 = Divide input clock by 128

•

•

•

0000101 = Divide input clock by 6 (default)

•

•

•

0000010 = Divide input clock by 3

0000001 = Divide input clock by 2

0000000 = Divide input clock by 1 (no divide)

 2009 Microchip Technology Inc.

Preliminary

DS70292D-page 267

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