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MC145220 View Datasheet(PDF) - Motorola => Freescale

Part Name
Motorola => Freescale Motorola
MC145220 Datasheet PDF : 27 Pages
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Configurable Digital Output (Pin 10)
Output A is selectable as fR, fV, fRi, fVi, Data Out, or Port.
Bits A21 and A22 and the steering bit (A23) control the selec-
tion; see Figure 15. When selected as Port, the pin becomes
an open–drain N–channel MOSFET output. As such, a
pullup device is needed for pin 10. With all other selections,
the pin is a totem–pole (push–pull) output.
If A22 = A21 = high, Output A is configured as fR when the
steering bit is low and fRi when the bit is high. These signals
are the buffered outputs of the 13–stage R counters. The sig-
nals appear as normally low and pulse high. The signals can
be used to verify the divide ratios of the R counters. These
ratios extend from 10 to 8191 and are determined by the
binary value loaded into bits R0 – R12 in the R register. Also,
direct access to the phase detectors via the REFin pin is
allowed by choosing a divide value of one. See Figure 16.
The maximum frequency at which the phase detectors oper-
ate is 1 MHz. Therefore, the frequency of fR and fRi should
not exceed 1 MHz.
If A22 = high and A21 = low, Output A is configured as fV
when the steering bit is low and fVi when the bit is high.
These signals are the buffered outputs of the 12–stage N
counters. The signals appear as normally low and pulse
high. The signals can be used to verify the operation of the
prescalers, A counters, and N counters. The divide ratio be-
tween the fin or fininput and the fV or fVi signal is N x P + A.
N is the divide ratio of the N counter, P is 32 with a 32/33
prescale ratio or 64 with a 64/65 prescale ratio, and A is the
divide ratio of the A counter. These ratios are determined by
bits loaded into the A registers. See Figure 15. The maxi-
mum frequency at which the phase detectors operate is
1 MHz. Therefore, the frequency of fV and fVi should not
exceed 1 MHz.
If A22 = low and A21 = high, Output A is configured as
Data Out. This signal is the serial output of the 24–1/2 stage
shift register. The bit stream is shifted out on the high–to–low
transition of the CLK input. Upon power up, Output A is
automatically configured as Data Out to facilitate cascading
If A22 = A21 = low, Output A is configured as Port. This
signal is a general–purpose digital output which may be used
as an MCU port expander. This signal is low when the Port
bit (C1) of the C register is low, and high impedance when
the Port bit is high. See Figure 14.
REFin and REFout
Reference Oscillator Input and Output (Pins 1 and 2)
Configurable Pins for a Crystal or an External Reference.
This pair of pins can be configured in one of two modes: the
crystal mode or the reference mode. Bits R13, R14, and R15
in the R register control the modes as shown in Figure 16.
In the crystal mode, these pins form a reference oscillator
when connected to terminals of an external parallel–reso-
nant crystal. Frequency–setting capacitors of appropriate
values, as recommended by the crystal supplier, are con-
nected from each of the two pins to ground (up to a maximum
of 30 pF each, including stray capacitance). An external re-
sistor of 1 Mto 15 Mis connected directly across the pins
to ensure linear operation of the amplifier. The required con-
nections for the crystal are shown in Figure 9. To turn on the
oscillator, bits R15, R14, and R13 must have an octal value
of one (001 in binary). This is the active–crystal mode shown
in Figure 16. In this mode, the crystal oscillator runs and the
R Counter divides the crystal frequency, unless the part is in
standby. If the part is placed in standby via the C or Cregis-
ter, the oscillator runs, but the R or Rcounter is stopped, re-
spectively. However, if bits R15 to R13 have a value of 0, the
oscillator is stopped, which saves additional power. This is
the shut–down crystal mode shown in Figure 16, and can be
engaged whether in standby or not.
In the reference mode, REFin (pin 1) accepts a signal from
an external reference oscillator, such as a TCXO. A signal
swinging from at least the VIL to VIH levels listed in the Elec-
trical Characteristics table may be directly coupled to the
pin. If the signal is less than this level, ac coupling must be
used as shown in Figure 8. The ac–coupled signal must be at
least 400 mV p–p. Due to an on–board resistor which is
engaged in the reference modes, an external biasing resistor
tied between REFin and REFout is not required.
With the reference mode, the REFout pin is configured as
the output of a divider. As an example, if bits R15, R14,
and R13 have an octal value of seven, the frequency at
REFout is the REFin frequency divided by 16. In addition,
Figure 16 shows how to obtain ratios of eight, four, and two.
A ratio of one–to–one can be obtained with an octal value of
three. Upon power up, a ratio of eight is automatically in-
itialized. The maximum frequency capability of the REFout
pin is 5 MHz for large output swings (VOH to VOL) and 25 pF
loads. Therefore, for REFin frequencies above 5 MHz, the
one–to–one ratio may not be used for these large signal
swing and large CL requirements. Likewise, for REFin fre-
quencies above 10 MHz, the ratio must be more than two.
If REFout is unused, an octal value of two should be used
for R15, R14, and R13 and the REFout pin should be
floated. A value of two allows REFin to be functional while
disabling REFout, which minimizes dynamic power con-
sumption and electromagnetic interference (EMI).
fin, fin and fini, fini
Frequency Inputs (Pins 8, 7 and 13, 14)
These pins feed the onboard RF amplifiers which drive the
prescalers. These inputs may be fed differentially. However,
they usually are used in single–ended configurations (shown
in Figure 7). Note that fin is driven while fin must be tied to ac
ground (via capacitor). The signal sources driving these pins
originate from external VCOs.
Motorola does not recommend driving fin while terminating
fin because this configuration is not tested for sensitivity. The
sensitivity is dependent on the frequency as shown in the
Loop Specifications table.

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