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ZPSD412A0-C-70U [Low Cost Field Programmable Microcontroller Peripherals ]

other parts : PSD401A1  PSD401A1-C-12J  PSD401A1-C-15J  PSD401A1-C-15L  PSD401A1-C-15U  PSD401A1-C-70J  PSD401A1-C-70L 

ST-Microelectronics
STMicroelectronics

Introduction
The PSD4XX family is a microcontroller peripheral that integrates high-performance and user-configurable blocks of EPROM, programmable logic, and SRAM into one part. The PSD4XX products also provide a powerful microcontroller interface that eliminates the need for external “glue logic”. The no “glue logic” concept provides a user-programmable interface to a variety of 8- and 16-bit (multiplexed or non-multiplexed) microcontrollers that is easy to use. The part’s integration, small form factor, low power consumption, and ease of use make it the ideal part for interfacing to virtually any microcontroller.
The PSD4XX provides two Zero-power PLDs (ZPLD): a Decode PLD (DPLD) and a General-purpose PLD (GPLD). A configuration bit (Turbo) can be set by the MCU, and will automatically place the ZPLDs into Standby Mode if no inputs are changing. The ZPLDs are designed to consume minimum power using Zero-power CMOS technology that uses only 10 µA (typical) standby current. Unused product terms are automatically disabled, also reducing power, regardless of the Turbo bit setting

FEATURES SUMMARY
■ Single Supply Voltage:
   – 5 V±10% for PSD4XX
   – 2.7 to 5.5 V for PSD4XX-V
■ Up to 1 Mbit of UV EPROM
■ Up to 16 Kbit SRAM
■ Input Latches
■ Programmable I/O ports
■ Page Logic
■ Programmable Security

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UPSD3253BV-40U6 [Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM ]

other parts : UPSD3253A  UPSD3253A-24T1  UPSD3253A-24T1T  UPSD3253A-24T6  UPSD3253A-24T6T  UPSD3253A-24U1  UPSD3253A-24U1T 

ST-Microelectronics
STMicroelectronics

SUMMARY DESCRIPTION
■ Dual bank Flash memories
   – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates
   – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic user interfaces
   – Large 32KByte secondary Flash memory di vided in small sectors. Eliminate external EE PROM with software EEPROM emulation
   – Secondary Flash memory is large enough for sophisticated communication protocol (USB) during IAP while continuing critical system tasks
■ Large SRAM with battery back-up option
   – 32KByte SRAM for RTOS, high-level languages, communication buffers, and stacks
■ Programmable Decode PLD for flexible address mapping of all memories
   – Place individual Flash and SRAM sectors on any address boundary
   – Built-in page register breaks restrictive 8032 limit of 64KByte address space
   – Special register swaps Flash memory segments between 8032 “program” space and “data” space for efficient In-Application Programming
■ High-speed clock standard 8032 core (12-cycle)
   – 40MHz operation at 5V, 24MHz at 3.3V
   – 2 UARTs with independent baud rate, three 16-bit Timer/Counters and two External Interrupts
■ USB Interface (some devices only)
   – Supports USB 1.1 Slow Mode (1.5Mbit/s)
   – Control endpoint 0 and interrupt endpoints 1 and 2
■ I2C interface for peripheral connections
   – Capable of master or slave operation
■ 5 Pulse Width Modulator (PWM) channels
   – Four 8-bit PWM units
   – One 8-bit PWM unit with programmable period
■ 4-channel, 8-bit Analog-to-Digital Converter (ADC) with analog supply voltage (VREF)
■ Standalone Display Data Channel (DDC)
   – For use in monitor, projector, and TV applications
   – Compliant with VESA standards DDC1 and DDC2B
   – Eliminate external DDC PROM
■ Six I/O ports with up to 50 I/O pins
   – Multifunction I/O: GPIO, DDC, I2C, PWM, PLD I/O, supervisor, and JTAG
   – Eliminates need for external latches and logic
■ 3000 gate PLD with 16 macrocells
   – Create glue logic, state machines, delays, etc.
   – Eliminate external PALs, PLDs, and 74HCxx
   – Simple PSDsoft Express software ...Free
■ Supervisor functions
   – Generates reset upon low voltage or watch dog time-out. Eliminate external supervisor device
   – RESET Input pin; Reset output via PLD
■ In-System Programming (ISP) via JTAG
   – Program entire chip in 10 - 25 seconds with no involvement of 8032
   – Allows efficient manufacturing, easy product testing, and Just-In-Time inventory
   – Eliminate sockets and pre-programmed parts
   – Program with FlashLINKTM cable and any PC
■ Content Security
   – Programmable Security Bit blocks access of device programmers and readers
■ Zero-Power Technology
   – Memories and PLD automatically reach standby current between input changes
■ Packages
   – 52-pin TQFP
   – 80-pin TQFP: allows access to 8032 address/data/control signals for connecting to external peripherals

 

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ZPSD211R-B-70M [Low Cost Field Programmable Microcontroller Peripherals ]

other parts : PSD211R  PSD211R-B-15J  PSD211R-B-15L  PSD211R-B-15M  PSD211R-B-70J  PSD211R-B-70L  PSD211R-B-70M 

ST-Microelectronics
STMicroelectronics

Introduction
The low cost PSD211R family integrates high-performance and user-configurable blocks of EPROM and programmable logic into one part. The PSD211R products also provide a powerful microcontroller interface that eliminates the need for external “glue logic”. The part’s integration, small form factor, low power consumption, and ease of use make it the ideal part for interfacing to virtually any microcontroller.

The major functional blocks of the PSD211R include:
• Two programmable logic arrays
• 256 Kb of EPROM
• Input latches
• Programmable I/O ports
• Programmable security

FEATURES SUMMARY
■ Single Supply Voltage:
   – 5 V±10% for PSD211R and ZPSD211R
   – 2.7 to 5.5 V for ZPSD211RV
■ Up to 256 Kbit of EPROM
■ Input Latches
■ Programmable I/O ports
■ Programmable Security

 

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ZPSD512B1-C-70J [Low Cost Field Programmable Microcontroller Peripherals ]

other parts : PSD501B1  PSD501B1-C-15J  PSD501B1-C-15L  PSD501B1-C-15U  PSD501B1-C-70J  PSD501B1-C-70L  PSD501B1-C-70U 

ST-Microelectronics
STMicroelectronics

Introduction
The PSD5XX family is a microcontroller peripheral that integrates high-performance and user-configurable blocks of EPROM, programmable logic, and SRAM into one part. The PSD5XX is also loaded with a variety of features, such as Counter/Timers, Interrupt controller, power management, and page logic. The PSD5XX products also provide a powerful microcontroller interface that eliminates the need for external “glue logic”. The no “glue logic” concept provides a user-programmable interface to a variety of 8- and 16-bit (multiplexed or non-multiplexed) microcontrollers that is easy to use. The part’s integration, small form factor, low power consumption, and ease of use make it the ideal part for interfacing to virtually any microcontroller.

FEATURES SUMMARY
■Single Supply Voltage:
    – 5 V±10% for PSD5XX
    – 2.7 to 5.5 V for PSD5XX-V
■Up to 1 Mbit of UV EPROM
■Up to 16 Kbit SRAM
■Input Latches
■Programmable I/O ports
■Page Logic
■Programmable Security

 

View
ZPSD403A1V-C-25J [Low Cost Field Programmable Microcontroller Peripherals ]

other parts : PSD401A1  PSD401A1-C-12J  PSD401A1-C-15J  PSD401A1-C-15L  PSD401A1-C-15U  PSD401A1-C-70J  PSD401A1-C-70L 

ST-Microelectronics
STMicroelectronics

Introduction
The PSD4XX family is a microcontroller peripheral that integrates high-performance and user-configurable blocks of EPROM, programmable logic, and SRAM into one part. The PSD4XX products also provide a powerful microcontroller interface that eliminates the need for external “glue logic”. The no “glue logic” concept provides a user-programmable interface to a variety of 8- and 16-bit (multiplexed or non-multiplexed) microcontrollers that is easy to use. The part’s integration, small form factor, low power consumption, and ease of use make it the ideal part for interfacing to virtually any microcontroller.
The PSD4XX provides two Zero-power PLDs (ZPLD): a Decode PLD (DPLD) and a General-purpose PLD (GPLD). A configuration bit (Turbo) can be set by the MCU, and will automatically place the ZPLDs into Standby Mode if no inputs are changing. The ZPLDs are designed to consume minimum power using Zero-power CMOS technology that uses only 10 µA (typical) standby current. Unused product terms are automatically disabled, also reducing power, regardless of the Turbo bit setting

FEATURES SUMMARY
■ Single Supply Voltage:
   – 5 V±10% for PSD4XX
   – 2.7 to 5.5 V for PSD4XX-V
■ Up to 1 Mbit of UV EPROM
■ Up to 16 Kbit SRAM
■ Input Latches
■ Programmable I/O ports
■ Page Logic
■ Programmable Security

View
UPSD3253A-24T6 [Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM ]

other parts : UPSD3253A  UPSD3253A-24T1  UPSD3253A-24T1T  UPSD3253A-24T6T  UPSD3253A-24U1  UPSD3253A-24U1T  UPSD3253A-24U6 

ST-Microelectronics
STMicroelectronics

SUMMARY DESCRIPTION
■ Dual bank Flash memories
   – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates
   – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic user interfaces
   – Large 32KByte secondary Flash memory di vided in small sectors. Eliminate external EE PROM with software EEPROM emulation
   – Secondary Flash memory is large enough for sophisticated communication protocol (USB) during IAP while continuing critical system tasks
■ Large SRAM with battery back-up option
   – 32KByte SRAM for RTOS, high-level languages, communication buffers, and stacks
■ Programmable Decode PLD for flexible address mapping of all memories
   – Place individual Flash and SRAM sectors on any address boundary
   – Built-in page register breaks restrictive 8032 limit of 64KByte address space
   – Special register swaps Flash memory segments between 8032 “program” space and “data” space for efficient In-Application Programming
■ High-speed clock standard 8032 core (12-cycle)
   – 40MHz operation at 5V, 24MHz at 3.3V
   – 2 UARTs with independent baud rate, three 16-bit Timer/Counters and two External Interrupts
■ USB Interface (some devices only)
   – Supports USB 1.1 Slow Mode (1.5Mbit/s)
   – Control endpoint 0 and interrupt endpoints 1 and 2
■ I2C interface for peripheral connections
   – Capable of master or slave operation
■ 5 Pulse Width Modulator (PWM) channels
   – Four 8-bit PWM units
   – One 8-bit PWM unit with programmable period
■ 4-channel, 8-bit Analog-to-Digital Converter (ADC) with analog supply voltage (VREF)
■ Standalone Display Data Channel (DDC)
   – For use in monitor, projector, and TV applications
   – Compliant with VESA standards DDC1 and DDC2B
   – Eliminate external DDC PROM
■ Six I/O ports with up to 50 I/O pins
   – Multifunction I/O: GPIO, DDC, I2C, PWM, PLD I/O, supervisor, and JTAG
   – Eliminates need for external latches and logic
■ 3000 gate PLD with 16 macrocells
   – Create glue logic, state machines, delays, etc.
   – Eliminate external PALs, PLDs, and 74HCxx
   – Simple PSDsoft Express software ...Free
■ Supervisor functions
   – Generates reset upon low voltage or watch dog time-out. Eliminate external supervisor device
   – RESET Input pin; Reset output via PLD
■ In-System Programming (ISP) via JTAG
   – Program entire chip in 10 - 25 seconds with no involvement of 8032
   – Allows efficient manufacturing, easy product testing, and Just-In-Time inventory
   – Eliminate sockets and pre-programmed parts
   – Program with FlashLINKTM cable and any PC
■ Content Security
   – Programmable Security Bit blocks access of device programmers and readers
■ Zero-Power Technology
   – Memories and PLD automatically reach standby current between input changes
■ Packages
   – 52-pin TQFP
   – 80-pin TQFP: allows access to 8032 address/data/control signals for connecting to external peripherals

 

View
ZPSD502B1-C-15U [Low Cost Field Programmable Microcontroller Peripherals ]

other parts : PSD501B1  PSD501B1-C-15J  PSD501B1-C-15L  PSD501B1-C-15U  PSD501B1-C-70J  PSD501B1-C-70L  PSD501B1-C-70U 

ST-Microelectronics
STMicroelectronics

Introduction
The PSD5XX family is a microcontroller peripheral that integrates high-performance and user-configurable blocks of EPROM, programmable logic, and SRAM into one part. The PSD5XX is also loaded with a variety of features, such as Counter/Timers, Interrupt controller, power management, and page logic. The PSD5XX products also provide a powerful microcontroller interface that eliminates the need for external “glue logic”. The no “glue logic” concept provides a user-programmable interface to a variety of 8- and 16-bit (multiplexed or non-multiplexed) microcontrollers that is easy to use. The part’s integration, small form factor, low power consumption, and ease of use make it the ideal part for interfacing to virtually any microcontroller.

FEATURES SUMMARY
■Single Supply Voltage:
    – 5 V±10% for PSD5XX
    – 2.7 to 5.5 V for PSD5XX-V
■Up to 1 Mbit of UV EPROM
■Up to 16 Kbit SRAM
■Input Latches
■Programmable I/O ports
■Page Logic
■Programmable Security

 

View
ZPSD401A2-C-70L [Low Cost Field Programmable Microcontroller Peripherals ]

other parts : PSD401A1  PSD401A1-C-12J  PSD401A1-C-15J  PSD401A1-C-15L  PSD401A1-C-15U  PSD401A1-C-70J  PSD401A1-C-70L 

ST-Microelectronics
STMicroelectronics

Introduction
The PSD4XX family is a microcontroller peripheral that integrates high-performance and user-configurable blocks of EPROM, programmable logic, and SRAM into one part. The PSD4XX products also provide a powerful microcontroller interface that eliminates the need for external “glue logic”. The no “glue logic” concept provides a user-programmable interface to a variety of 8- and 16-bit (multiplexed or non-multiplexed) microcontrollers that is easy to use. The part’s integration, small form factor, low power consumption, and ease of use make it the ideal part for interfacing to virtually any microcontroller.
The PSD4XX provides two Zero-power PLDs (ZPLD): a Decode PLD (DPLD) and a General-purpose PLD (GPLD). A configuration bit (Turbo) can be set by the MCU, and will automatically place the ZPLDs into Standby Mode if no inputs are changing. The ZPLDs are designed to consume minimum power using Zero-power CMOS technology that uses only 10 µA (typical) standby current. Unused product terms are automatically disabled, also reducing power, regardless of the Turbo bit setting

FEATURES SUMMARY
■ Single Supply Voltage:
   – 5 V±10% for PSD4XX
   – 2.7 to 5.5 V for PSD4XX-V
■ Up to 1 Mbit of UV EPROM
■ Up to 16 Kbit SRAM
■ Input Latches
■ Programmable I/O ports
■ Page Logic
■ Programmable Security

View
UPSD3234A-24U6 [Flash Programmable System Devices with 8032 Microcontroller Core and 64 Kbit SRAM ]

other parts : UPSD3233A-24T1  UPSD3233A-24T6  UPSD3233A-24U1  UPSD3233A-24U6  UPSD3233A-40T1  UPSD3233A-40T6  UPSD3233A-40U1 

ST-Microelectronics
STMicroelectronics

SUMMARY DESCRIPTION
The uPSD323x Series combines a fast 8051-based microcontroller with a flexible memory structure, programmable logic, and a rich periph eral mix including USB, to form an ideal embedded controller. At its core is an industry-standard 8032 MCU operating up to 40MHz.
A JTAG serial interface is used for In-System Programming (ISP) in as little as 10 seconds, perfect for manufacturing and lab development.
The USB 1.1 low-speed interface has one Control endpoint and two Interrupt endpoints suitable for HID class drivers.
The 8032 core is coupled to Programmable System Device (PSD) architecture to optimize the 8032 memory structure, offering two independent banks of Flash memory that can be placed at virtually any address within 8032 program or data address space, and easily paged beyond 64K bytes using on-chip programmable decode logic.
LButtonDual Flash memory banks provide a robust solution for remote product updates in the field through In-Application Programming (IAP). Dual Flash banks also support EEPROM emulation, eliminat ing the need for external EEPROM chips.

FEATURES SUMMARY
■ FAST 8-BIT 8032 MCU
   – 40MHz at 5.0V, 24MHz at 3.3V
   – Core, 12-clocks per instruction
■ DUAL FLASH MEMORIES WITH MEMORY MANAGEMENT
   – Place either memory into 8032 program address space or data address space
   – READ-while-WRITE operation for In Application Programming and EEPROM emulation
   – Single voltage program and erase
   – 100K minimum erase cycles, 15-year retention
■ CLOCK, RESET, AND SUPPLY MANAGEMENT
   – SRAM is Battery Backup capable
   – Normal, Idle, and Power Down Modes
   – Power-on and Low Voltage reset supervisor
   – Programmable Watchdog Timer
■ PROGRAMMABLE LOGIC, GENERAL PURPOSE
   – 16 macrocells
   – Implements state machines, glue-logic, and so forth
■ COMMUNICATION INTERFACES
   – USB v1.1, low-speed 1.5Mbps, 3 endpoints
   – I2C Master/Slave bus controller
   – Two UARTs with independent baud rate
   – Six I/O ports with up to 46 I/O pins
   – 8032 Address/Data bus available on TQFP80 package
   – 5 PWM outputs, 8-bit resolution
■ JTAG IN-SYSTEM PROGRAMMING
   – Program the entire device in as little as 10 seconds
■ A/D CONVERTER
   – Four channels, 8-bit resolution, 10µs
■ TIMERS AND INTERRUPTS
   – Three 8032 standard 16-bit timers
   – 10 Interrupt sources with two external interrupt pins
■ Single Supply Voltage
   – 4.5 to 5.5V
   – 3.0 to 3.6V

 

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UPSD3233BV-24T6 [Flash Programmable System Devices with 8032 Microcontroller Core and 64 Kbit SRAM ]

other parts : UPSD3233A-24T1  UPSD3233A-24T6  UPSD3233A-24U1  UPSD3233A-24U6  UPSD3233A-40T1  UPSD3233A-40T6  UPSD3233A-40U1 

ST-Microelectronics
STMicroelectronics

SUMMARY DESCRIPTION
The uPSD323x Series combines a fast 8051-based microcontroller with a flexible memory structure, programmable logic, and a rich periph eral mix including USB, to form an ideal embedded controller. At its core is an industry-standard 8032 MCU operating up to 40MHz.
A JTAG serial interface is used for In-System Programming (ISP) in as little as 10 seconds, perfect for manufacturing and lab development.
The USB 1.1 low-speed interface has one Control endpoint and two Interrupt endpoints suitable for HID class drivers.
The 8032 core is coupled to Programmable System Device (PSD) architecture to optimize the 8032 memory structure, offering two independent banks of Flash memory that can be placed at virtually any address within 8032 program or data address space, and easily paged beyond 64K bytes using on-chip programmable decode logic.
LButtonDual Flash memory banks provide a robust solution for remote product updates in the field through In-Application Programming (IAP). Dual Flash banks also support EEPROM emulation, eliminat ing the need for external EEPROM chips.

FEATURES SUMMARY
■ FAST 8-BIT 8032 MCU
   – 40MHz at 5.0V, 24MHz at 3.3V
   – Core, 12-clocks per instruction
■ DUAL FLASH MEMORIES WITH MEMORY MANAGEMENT
   – Place either memory into 8032 program address space or data address space
   – READ-while-WRITE operation for In Application Programming and EEPROM emulation
   – Single voltage program and erase
   – 100K minimum erase cycles, 15-year retention
■ CLOCK, RESET, AND SUPPLY MANAGEMENT
   – SRAM is Battery Backup capable
   – Normal, Idle, and Power Down Modes
   – Power-on and Low Voltage reset supervisor
   – Programmable Watchdog Timer
■ PROGRAMMABLE LOGIC, GENERAL PURPOSE
   – 16 macrocells
   – Implements state machines, glue-logic, and so forth
■ COMMUNICATION INTERFACES
   – USB v1.1, low-speed 1.5Mbps, 3 endpoints
   – I2C Master/Slave bus controller
   – Two UARTs with independent baud rate
   – Six I/O ports with up to 46 I/O pins
   – 8032 Address/Data bus available on TQFP80 package
   – 5 PWM outputs, 8-bit resolution
■ JTAG IN-SYSTEM PROGRAMMING
   – Program the entire device in as little as 10 seconds
■ A/D CONVERTER
   – Four channels, 8-bit resolution, 10µs
■ TIMERS AND INTERRUPTS
   – Three 8032 standard 16-bit timers
   – 10 Interrupt sources with two external interrupt pins
■ Single Supply Voltage
   – 4.5 to 5.5V
   – 3.0 to 3.6V

 

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