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74ALVCH16240 Datasheet - STMicroelectronics

74ALVCH16240 Datasheet PDF STMicroelectronics

Part Name
74ALVCH16240

Other PDF
  2003  

page
9 Pages

File Size
61.3 kB

MFG CO.
ST-Microelectronics
STMicroelectronics ST-Microelectronics

DESCRIPTION
The 74ALVCH16240 is a low voltage CMOS 16 BIT BUS BUFFER (INVERTED) fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs.
Any nG output control governs four BUS BUFFERS. Output Enable input (nG) tied together gives full 16-bit operation.
When nG is LOW, the outputs are enabled. When nG is HIGH, the output are in high impedance state.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. This device is designed to be used with 3 state memory address drivers, etc.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
   tPD = 3.9 ns (MAX.) at VCC = 3.0 to 3.6V
   tPD = 5.3 ns (MAX.) at VCC = 2.3 to 2.7V
   tPD = 7.5 ns (MAX.) at VCC = 1.65V
■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 24mA (MIN) at VCC = 3.0V
   |IOH| = IOL = 18mA (MIN) at VCC = 2.3V
   |IOH| = IOL = 4mA (MIN) at VCC = 1.65V
■ OPERATING VOLTAGE RANGE:
   VCC(OPR) = 1.65V to 3.6V
■ BUS HOLD PROVIDED ON DATA INPUTS
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16240
■ LATCH-UP PERFORMANCE EXCEEDS
   300mA (JESD 17)
■ ESD PERFORMANCE:
   HBM > 2000V (MIL STD 883 method 3015);
   MM > 200V

Page Link's: 1  2  3  4  5  6  7  8  9 

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