DESCRIPTION
The 74LVQ174 is a low voltage CMOS HEX D-TYPE FLIP FLOP WITH CLEAR NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.
Information signals applied to D inputs are transferred to the Q outputs on the positive going edge of the CLK pulse.
When the CLR input is held low, the Q outputs are held low independently of the other inputs.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
â HIGH SPEED:
fMAX = 150 MHz (TYP.) at VCC = 3.3 V
â COMPATIBLE WITH TTL OUTPUTS
â LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
â LOW NOISE:
VOLP = 0.3V (TYP.) at VCC = 3.3V
â 75⦠TRANSMISSION LINE DRIVING CAPABILITY
â SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 12mA (MIN) at VCC = 3.0 V
â PCI BUS LEVELS GUARANTEED AT 24 mA
â BALANCED PROPAGATION DELAYS: tPLH â
tPHL
â OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
â PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174
â IMPROVED LATCH-UP IMMUNITY
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