General Description
N channel vertical power FET in Smart SIPMOSï chip on chip technology. Fully protected by embedded protected functions.
Features
⢠Logic Level Input
⢠Input Protection (ESD)
â¢=Thermal shutdown with latch
⢠Overload protection
⢠Short circuit protection
⢠Overvoltage protection
⢠Current limitation
⢠Status feedback with external input resistor
⢠Analog driving possible
Application
⢠All kinds of resistive, inductive and capacitive loads in switching or
linear applications
⢠µC compatible power switch for 12 V and 24 V DC applications
⢠Replaces electromechanical relays and discrete circuits
|