General Description
Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR-invert gates. Separate strobe inputs are provided for each of the two four-line sections.
Features
â Permits multiplexing from N lines to 1 line
â Performs parallel-to-serial conversion
â Strobe (enable) line provided for cascading (N lines to n lines)
â High fan-out, low-impedance, totem-pole outputs
â Typical average propagation delay times
From data 6 ns
From strobe 9.5 ns
From select 12 ns
â Typical power dissipation 225 mW
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