FDC37B78X 查看數據表（PDF） - SMSC -> Microchip

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FDC37B78X

Enhanced Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR

SMSC -> Microchip 

ROM INTERFACE

nROMCS

nROMOE

RD[x]

SD[x]

t2

t1

Note 1

t7 Note 2

t3

t2

t8 t3

t4

t5

t6

FIGURE 11 - ROM INTERFACE TIMING

Note 1: RD[x] driven by FDC37B78x, SD[x] driven by system

Note 2: RD[x] driven by ROM, SD[x] driven by FDC37B78x

TABLE 91 - ROM INTERFACE TIMING

NAME

DESCRIPTION

MIN

TYP

t1 SD[x] Valid to RD[x] Valid

t2 nROMCS Active to RD[X] Driven

t3 nROMCS Inactive to RD[X] Float

t4 RD[x] Valid to SD[x] Valid

t5 nROMCS Active to SD[X] Driven

t6 nROMCS Inactive to SD[X] Float

t7 nROMOE Active to RD[x] Float

t8 nROMOE Inactive to RD[x] Driven

Note 1: Outputs have a 50 pf load.

MAX

25

25

25

25

25

25

25

25

UNITS

ns

ns

ns

ns

ns

ns

ns

ns

228

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