PIC18F4610-I/ML 查看數據表（PDF） - Microchip Technology
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PIC18F4610-I/ML
Microchip Technology
PIC18F4610-I/ML Datasheet PDF : 378 Pages
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PIC18F2X1X/4X1X
FIGURE 17-4:
Write to TXREG
BRG Output
(Shift Clock)
TX
(pin)
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
ASYNCHRONOUS TRANSMISSION
Word 1
Start bit
bit 0
1 TCY
bit 1
Word 1
Word 1
Transmit Shift Reg
bit 7/8 Stop bit
FIGURE 17-5:
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
Write to TXREG
BRG Output
(Shift Clock)
TX
(pin)
TXIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Word 2
1 TCY
Start bit
bit 0
Word 1
Transmit Shift Reg.
1 TCY
Note: This timing diagram shows two consecutive transmissions.
bit 1
Word 1
bit 7/8 Stop bit
Start bit
bit 0
Word 2
Word 2
Transmit Shift Reg.
TABLE 17-5: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
PIR1
PIE1
IPR1
GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
49
PSPIF(1) ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
52
PSPIE(1) ADIE
RCIE
TXIE SSPIE CCP1IE TMR2IE TMR1IE 52
PSPIP(1) ADIP
RCIP
TXIP SSPIP CCP1IP TMR2IP TMR1IP 52
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D
51
TXREG
EUSART Transmit Register
51
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D
51
BAUDCON ABDOVF RCIDL
—
SCKP BRG16
—
WUE ABDEN 51
SPBRGH EUSART Baud Rate Generator Register, High Byte
51
SPBRG
EUSART Baud Rate Generator Register, Low Byte
51
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note 1: These bits are unimplemented on 28-pin devices and read as ‘0’.
© 2007 Microchip Technology Inc.
Preliminary
DS39636C-page 201
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