PIC18LF4420T-I/SO 查看數據表（PDF） - Microchip Technology

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PIC18LF4420T-I/SO

28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F2420/2520/4420/4520

9.5 RCON Register

The RCON register contains flag bits which are used to

determine the cause of the last Reset or wake-up from

Idle or Sleep modes. RCON also contains the IPEN bit

which enables interrupt priorities.

The operation of the SBOREN bit and the Reset flag

bits is discussed in more detail in Section 4.1 “RCON

Register”.

REGISTER 9-10: RCON REGISTER

R/W-0 R/W-1(1)

U-0

R/W-1

R-1

IPEN SBOREN

—

RI

TO

bit 7

R-1

R/W-0(1) R/W-0

PD

POR

BOR

bit 0

bit 7 IPEN: Interrupt Priority Enable bit

1 = Enable priority levels on interrupts

0 = Disable priority levels on interrupts (PIC16XXX Compatibility mode)

bit 6 SBOREN: Software BOR Enable bit(1)

For details of bit operation, see Register 4-1.

Note 1: Actual Reset values are determined by device configuration and the nature of the

device Reset. See Register 4-1 for additional information.

bit 5 Unimplemented: Read as ‘0’

bit 4 RI: RESET Instruction Flag bit

For details of bit operation, see Register 4-1.

bit 3 TO: Watchdog Time-out Flag bit

For details of bit operation, see Register 4-1.

bit 2 PD: Power-down Detection Flag bit

For details of bit operation, see Register 4-1.

bit 1 POR: Power-on Reset Status bit

For details of bit operation, see Register 4-1.

bit 0 BOR: Brown-out Reset Status bit

For details of bit operation, see Register 4-1.

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

DS39631A-page 102

Preliminary

 2004 Microchip Technology Inc.

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