PIC16LC717T-I/SO 查看數據表（PDF） - Microchip Technology

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PIC16LC717T-I/SO

18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

Microchip Technology 

PIC16C717/770/771

12.12 Watchdog Timer (WDT)

The Watchdog Timer is a free running on-chip RC oscil-

lator, which does not require any external components.

This oscillator is in dependent from the processor

clock. The WDT will run, even if the main clock of the

device has been stopped, for example, by execution of

a SLEEP instruction.

During normal operation, a WDT time-out generates a

device RESET (Watchdog Timer Reset). If the device is

in SLEEP mode, a WDT time-out causes the device to

wake-up and continue with normal operation (Watch-

dog Timer Wake-up). The TO bit in the STATUS register

will be cleared upon a Watchdog Timer time-out.

The WDT can be permanently disabled by program-

ming the configuration bit WDTE (Section 12.1)’0’.

WDT time-out period values may be found in the Elec-

trical Specifications. Values for the WDT prescaler may

be assigned using the OPTION_REG register.

Note:

The CLRWDT and SLEEP instructions clear

the WDT and the postscaler, if assigned to

the WDT, and prevent it from timing out and

generating a device RESET condition.

.

Note:

When a CLRWDT instruction is executed

and the prescaler is assigned to the WDT,

the prescaler count will be cleared, but the

prescaler assignment is not changed.

FIGURE 12-12: WATCHDOG TIMER BLOCK DIAGRAM

From TMR0 Clock Source

(Figure 5-2)

WDT Timer

0

M

1U

X

Postscaler

8

WDT

Enable Bit(2)

PSA

8 - to - 1 MUX

PS<2:0>(1)

To TMR0 (Figure 5-2)

0

1

MUX

PSA(1)

Note 1: PSA and PS<2:0> are bits in the OPTION_REG register.

2: WDTE bit in the configuration word.

WDT

Time-out

TABLE 12-7: SUMMARY OF WATCHDOG TIMER REGISTERS

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

2007h

Config. bits(1)

—

BODEN MCLRE PWRTE WDTE

81h,181h OPTION_REG RBPU INTEDG T0CS T0SE

PSA

Legend: Shaded cells are not used by the Watchdog Timer.

Note 1: See Figure 12-1 for the full description of the configuration word bits.

Bit 2

FOSC2

PS2

Bit 1

FOSC1

PS1

Bit 0

FOSC0

PS0

© 1999 Microchip Technology Inc.

Advanced Information

DS41120A-page 137

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