ST72F521R9TC 查看數據表（PDF） - STMicroelectronics

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ST72F521R9TC

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE

STMicroelectronics 

ST72521

10.8 CONTROLLER AREA NETWORK (CAN)

10.8.1 Introduction

This peripheral is designed to support serial data

exchanges using a multi-master contention based

priority scheme as described in CAN specification

Rev. 2.0 part A. It can also be connected to a 2.0 B

network without problems, since extended frames

Figure 67. CAN Block Diagram

are checked for correctness and acknowledged

accordingly although such frames cannot be trans-

mitted nor received. The same applies to overload

frames which are recognized but never initiated.

ST7 Internal Bus

ST7 Interface

TX/RX

Buffer 1

10 Bytes

TX/RX

Buffer 2

10 Bytes

TX/RX

Buffer 3

10 Bytes

ID

Filter 0

4 Bytes

ID

Filter 1

4 Bytes

RX

BTL

BCDL

SHREG

TX

EML

CRC

CAN 2.0B passive Core

PSR

BRPR

BTR

ICR

ISR

CSR

TECR

RECR

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