AT91SAM9G46B-CU 查看數據表（PDF） - Atmel Corporation

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产品描述 (功能)

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AT91SAM9G46B-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

Doc. Rev

11028F

Date

16-Oct-14

Comments

Updated document format.

Updated Section 45. “Triple Data Encryption Standard (TDES)”

Added Section 51.3.1.2 “Boot ROM: SD Card Boot is not functional”

Updated Section 51.3.10.1 “UHPHS/UDPHS: USB Does Not Start after Power-up”

Doc. Rev

11028E

Comments

In “Description” on page 1, added mention of DBGU

Corrected acesses to DDR Port 2 in Table 18-3 “SAM9G46 Masters to Slaves Access DDRMP_DIS =

0”and Table 18-4 “SAM9G46 Masters to Slaves Access with DDRMP_DIS = 1 (default)”.

Corrected reset value for “EBI Chip Select Assignment Register”in Table 18-7, “Chip Configuration User

Interface” and in Section 18.7.6.3 “EBI Chip Select Assignment Register”

Change

Request

Ref.

rfo(1)

8809

8007

Update with Rev. B ordering code in Table 50-1 “AT91SAM9G46 Ordering Information”

In Section 51.2 “SAM9G46 Errata - Rev. A Parts” replace errata Section 52.3.11.1 “PMC: Bad Lock of

the USB High speed transceiver DLL” with updated errata Section 51.2.10.2 “UHPHS/UDPHS: Bad Lock

of the USB High speed transceiver DLL”.

Insert Section 51.3 “SAM9G46 Errata - Rev. B Parts” on page 1268.

8551

8372

Doc. Rev

11028D

Comments

Introduction

Write Protected Registers added in Features

Comment added in NRST line of Table 2-1 on page 5.

Boot strategies

Table 10-1 added in Section 10.3.2 “Initialization Sequence” on page 58.

RSTC

Comment added in last but one paragraph in Section 11.2 “Embedded Characteristics” on page 70.

RTC

Last sentence clarified in Section 12.5 “Functional Description” on page 84.

DDRSDRC

Bit 16 DQMS replaced by EBISHARE and corresponding bit definition changed in Section 21.7.3

“DDRSDRC Configuration Register” on page 254.

Change

Request

Ref.

8213

8350

8268

8350

7893

7899

SPI

Missing flags (UNDES, TXBUFE, RXBUFF, ENDTX, ENDRX) and their definitions added in Section

28.8.5 “SPI Status Register” on page 444, Section 28.8.6 “SPI Interrupt Enable Register” on page 446,

Section 28.8.7 “SPI Interrupt Disable Register” on page 447, Section 28.8.8 “SPI Interrupt Mask

Register” on page 448.

8247

1264 SAM9G46 Series [DATASHEET]

Atmel-11028G-ATARM-SAM9G46-Datasheet_08-Dec-15

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