EL5176
Simplified Schematic
VS+
R1
R2
IN+
IN-
FBP FBN
R3
R7
R4
R8
VB1
CC
R5
R6
VS-
VB2
CC
OUT+
RCD
RCD
R9
OUT-
REF
R10
Description of Operation and
Application Information
Product Description
The EL5176 is a wide bandwidth, low power and
single/differential ended to differential output amplifier. It can
be used as single/differential ended to differential converter. The
EL5176 is internally compensated for closed loop gain of +1 or
greater. Connected in gain of 1 and driving a 1kΩ differential
load, the EL5176 has a -3dB bandwidth of 250MHz. Driving a
200Ω differential load at gain of 2, the bandwidth is about
30MHz. The EL5176 is available with a power-down feature to
reduce the power while the amplifier is disabled.
Input, Output, and Supply Voltage Range
The EL5176 has been designed to operate with a single supply
voltage of 5V to 10V or a split supplies with its total voltage from
5V to 10V. The amplifier has an input common mode voltage
range from -4.5V to 3.4V for ±5V supply. The differential mode
input range (DMIR) between the two inputs is from -2.3V to
+2.3V. The input voltage range at the REF pin is from -3.3V to
3.8V. If the input common mode or differential mode signal is
outside the above-specified ranges, it will cause the output signal
to become distorted.
The output of the EL5176 can swing from -3.8V to +3.9V at 1kΩ
differential load at ±5V supply. As the load resistance becomes
lower, the output swing is reduced.
Differential and Common Mode Gain Settings
The voltage applied at REF pin can set the output common mode
voltage and the gain is one. The differential gain is set by the RF
and RG network.
The gain setting for EL5176 is expressed in Equation 1:
VODM
=
VIN
+
–
VI
N
-
1
+
-2-R--R---G--F-
VOCM = VREF
VODM
=
VI
N
+
1
+
R-----F----1-R---+--G---R-----F---2-
Where:
• RF1 = RF2 = RF
RF1
(EQ. 1)
VIN+
VIN- RG
VREF
FBP
IN+
IN-
REF
FBN
RF2
VO+
VO-
FIGURE 23.
Choice of Feedback Resistor and Gain
Bandwidth Product
For applications that require a gain of +1, no feedback resistor is
required. Just short the OUT+ pin to the FBP pin and the OUT- pin to
the FBN pin. For gains greater than +1, the feedback resistor forms
a pole with the parasitic capacitance at the inverting input. As this
pole becomes smaller, the amplifier's phase margin is reduced.
This causes ringing in the time domain and peaking in the
frequency domain. Therefore, RF has some maximum value that
should not be exceeded for optimum performance. If a large value
of RF must be used, a small capacitor in the few Pico farad range
in parallel with RF can help to reduce the ringing and peaking at
the expense of reducing the bandwidth.
FN7343 Rev 5.00
August 28, 2012
Page 9 of 12