M40SZ100WMH6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M40SZ100WMH6

5V or 3V NVRAM SUPERVISOR FOR LPSRAM

STMicroelectronics 

M40SZ100Y, M40SZ100W

Figure 11. Power Up Timing

VCC

VPFD (max)

VPFD

VPFD (min)

VSO

E

ECON

RST

tRB

VOHB

tR

tCER

tREC

tEPD

tEPD

PFO

VALID

AI03937

Table 6. Power Down/Up AC Characteristics

Symbol

Parameter(1)

Min

Max

Unit

tF(2)

VPFD (max) to VPFD (min) VCC Fall Time

300

µs

tFB(3)

VPFD (min) to VSS VCC Fall Time

10

µs

tPFD

PFI to PFO Propagation Delay

15

25

µs

tR

VPFD(min) to VPFD (max) VCC Rise Time

10

µs

M40SZ100Y

tEPD

Chip Enable Propagation Delay (Low or High)

M40SZ100W

10

ns

15

ns

tRB

VSS to VPFD (min) VCC Rise Time

1

µs

tCER

Chip Enable Recovery

40

120

ms

tREC

VPFD (max) to RST High

40

200

ms

tWPT

Write Protect Time

40

200

µs

Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6V or 4.5 to 5.5V(except where noted).

2. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200 µs after VCC

passes VPFD (min).

3. VPFD (min) to VSS fall time of less than tFB may cause corruption of RAM data.

10/19

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