PRELIMINARY
ML2731
FUNCTIONAL DESCRIPTION
RECOMMENDED PA BIAS OPERATION
An example of how the PA bias operates is shown in Figure
11. A three-step reference voltage ramp is generated using
an external baseband circuit and is applied to the ICON
pin via an external resistor. The ML2731 current control
loop uses this input as a reference to set the PA current and
therefore generates a current ramp output (and hence PA
power ramp output.) The rate of change of negative bias
and PA current is determined by the capacitance on the
VBIAS pin and on the VPA pin. Note sufficient time should
be allowed for the negative voltage generator to reach a
steady state, prior to enabling the PA.
>0µsec
>200µs
PDN
VNEG
>0µsec
>0µsec
PAEN
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
VREF
VPA Current
5
10
15
160
140
120
100
80
60
40
20
0
20
3V
VControl Voltage
0V
0V
VBIAS Voltage
-3V
Current
VPAout current
Charge VNEG
caps
Time (µsec)
Figure 12: VPA output vs VREF (TRANSMIT mode, REXT = 12kW,
capacitance on VBIAS = 3.3nF)
discharge VNEG
caps
Timeconstant set by
external caps on VPA
Timeconstant set by
external caps on VBIAS
1
Figure 11: PA Bias Control Loop Operation
0
Where ICON is a fixed value (i.e. the VPA current is not
ramped up and down by changing the value of ICON)
-1
then the time taken for the VPA current to ramp up
following PAEN being enabled is determined by the
-2
capacitor values on VBIAS and VPA. The time taken for
the current to ramp down following PAEN being disabled
-3
is determined by the capacitance value on VPA only.
Example timings are:
-4
1msec ramp-up for 2nF VBIAS capacitance
-5
4msec ramp-up for 22nF VBIAS capacitance
-6
An example of a 3 step current ramp up and ramp down,
with 3.3nF capacitance on VBIAS, is shown in Figure 12.
-7
10
100
100
Frequency(KHz)
3.3nF 2.2nF 1.5nF
Figure 13: Bandwidth of PA Current control loop for 3.3nF,
2.2nF and 1.5nF VBIAS capacitance
10
PRELIMINARY DATASHEET January, 2000