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ML4819CS View Datasheet(PDF) - Micro Linear Corporation

Part Name
Description
Manufacturer
ML4819CS
Micro-Linear
Micro Linear Corporation 
ML4819CS Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ELECTRICAL CHARACTERISTICS (Continued)
PARAMETER
UNDER-VOLTAGE LOCKOUT
CONDITIONS
Start-Up Threshold
Shut-Down Threshold
VREF Good Threshold
SUPPLY
Supply Current
Start-Up, VCC = 14V
Operating, TJ = 25×C
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: VCC is raised above the Start-Up Threshold first to activate the IC, then returned to 15V.
Note 3: PWM comparator bias currents are subtracted from this reading.
ML4819
MIN
TYP
MAX
UNITS
15
16
17
V
9
10
11
V
4.4
V
0.6
1.2
mA
25
35
mA
FUNCTIONAL DESCRIPTION
OSCILLATOR
The ML4819 oscillator charges the external capacitor (CT)
with a current (ISET) equal to 5/RSET. When the capacitor
voltage reaches the upper threshold, the comparator
+5V
changes state and the capacitor discharges to the lower
threshold through Q1. While the capacitor is discharging,
the clock provides a high pulse.
The oscillator period can be described by the following
relationship:
tOSC = tRAMP + tDEADTIME
where:
t RAMP
=
C(Ramp
Valley
ISET
to
Peak)
and:
t DEADTIME
=
C(Ramp Valley to
8.4mA - ISET
Peak)
The maximum duty cycle of the PWM section can be
limited by setting a threshold on pin 7. when the CT ramp
is above the threshold at pin 7, the PWM output is held
off and the PWM flip-flop is set:
DLIMIT
DOSC
× (VPIN7
3.4
- 0.9)
where:
DLIMIT = Desired duty cycle limit
DOSC = Oscillator duty cycle
DUTY CYCLE
7
+
ISET
5V
10
VREF
RT
ISET
20
+
CT
8.4mA
Q1
TO PWM
LATCH B
CLOCK
TO PWM
LATCHES
CLOCK
tD
RAMP PEAK
CT
RAMP VALLEY
Figure 1. Oscillator Block Diagram
5

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