ZPSD403A2-C-70L View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ZPSD403A2-C-70L

Low Cost Field Programmable Microcontroller Peripherals

STMicroelectronics 

PSD4XX Family

The PSD4XX

Architecture

(cont.)

Table 6. Alternate Pin Functions

Pin Name

RD

WR

PE0

PE1

AD0

Pin

Function

1

RD

WR

BHE

ALE

A0

Pin

Function

2

E

R/W

PSEN

BLE

Pin

Function

3

DS

WRL

WRH

Pin

Function

4

LDS

UDS

Pin

Function

5

SIZ0

9.2.2 PSD4XX Interface To a Multiplexed Bus

Figure 20 shows a typical connection to a microcontroller with a multiplexed bus. The

ADIO port of the PSD4XX is connected directly to the microcontroller address/data bus

(AD0-AD15 for 16 bit bus). The ALE input signal latches the address lines internally. In a

read bus cycle, data is driven out through the ADIO Port transceivers after the specified

access time. The internal ADIO Port connection for a 16 bit multiplexed bus is shown in

Figure 21. The ADIO Port is in tri-state mode if none of the PSD4XX internal devices are

selected.

9.2.3 PSD4XX Interface To Non-Multiplexed Bus

Figure 22 shows a PSD4XX interfacing to a microcontroller with a non-multiplexed

address/data bus. The address bus is connected to the ADIO Port, and the data bus is

connected to Port C and/or Port D, depending on the bus width. There is no need for the

ADIO Port to latch the address internally, but the user is offered the option to do so in the

PSD4XX PSDsoft Software. The data Ports are in tri-state mode when the PSD4XX is not

accessed by the microcontroller.

38

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