PSD4XX Family
Microcontroller Interface – AC/DC Parameters (ZPSD4XXV Versions)
(3.0 V ± 10%)
Write Timing (3.0 V ± 10%)
Symbol
Parameter
-20
-25
EPROM_CMiser
Conditions Min Max Min Max
ON
Unit
tLVLX ALE or AS Pulse Width
30
30
ns
tAVLX Address Setup Time
(Note 1)
12
15
ns
tLXAX Address Hold Time
(Note 1)
12
17
ns
t AVWL
Address Valid to Leading
Edge of WR
(Notes 1 and 3) 35
50
ns
t SLWL CS Valid to Leading Edge of WR (Note 3)
40
60
ns
t DVWH WR Data Setup Time
(Note 3)
25
35
ns
t WHDX WR Data Hold Time
(Note 3)
5
10
ns
t WLWH WR Pulse Width
(Note 3)
30
30
ns
t WHAX
Trailing Edge of WR to Address
Invalid
(Note 3)
0
0
ns
t WHPV
Trailing Edge of WR to Port
Output Valid
(Note 3)
50
60
ns
t AVPV
Address Input Valid to
Address Output Delay
In 16-Bit Data Bus
Mode (Note 2)
40
60
In 8-Bit Data Bus
Mode (Note 2)
50
60
ns
ns
NOTES: 1. Any input used to select an internal PSD4XX function.
2. In multiplexed mode latched address generated from ADIO delay to address output on any Port.
3. WR timing has the same timing as E, DS, LDS, UDS, WRL, WRH signals.
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