TS4872IJT View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

TS4872IJT

RAIL TO RAIL INPUT/OUTPUT 1W AUDIO POWER AMPLIFIER WITH STANDBY MODE

STMicroelectronics 

TS4872

Fig. 83 : Flip Chip Demoboard Bottom Layer

The differential output voltage is

Vout2 – Vo ut1 = 2Vin R-----f-R-e---i-e-n---d---- (V)

The differential gain named gain (Gv) for more

convenient usage is :

G v = V-----o---u---t--2--V---–--i--nV-----o---u----t--1-- = 2 R-----f-R-e---i-e-n---d----

Remark : Vout2 is in phase with Vin and Vout1 is

180 phased with Vin. It means that the positive

terminal of the loudspeaker should be connected

to Vout2 and the negative to Vout1.

■ Low and high frequency response

t(s) ■ BTL Configuration Principle

uc The TS4872 is a monolithic power amplifier with a

rod BTL output type. BTL (Bridge Tied Load) means

that each end of the load is connected to two

P single ended output amplifiers. Thus, we have :

lete Single ended output 1 = Vout1 = Vout (V)

o Single ended output 2 = Vout2 = -Vout (V)

bs And Vout1 - Vout2 = 2Vout (V)

- O The output power is :

t(s) Pout = (2 Vout RMS )2 (W)

c RL

du For the same power supply voltage, the output

ro power in BTL configuration is four times higher

P than the output power in single ended

te configuration.

le ■ Gain In Typical Application Schematic (cf.

o page 1)

bsIn flat region (no effect of Cin), the output voltage

Oof the first stage is :

In low frequency region, the effect of Cin starts.

Cin with Rin forms a high pass filter with a -3dB cut

off frequency

FCL = --2----π------R---1--i--n-----C----i--n- (Hz)

In high frequency region, you can limit the

bandwidth by adding a capacitor (Cfeed) in parallel

on Rfeed. Its form a low pass filter with a -3dB cut

off frequency

FCH = --2----π------R-----f--e----1e---d------C----f--e---e----d- (Hz)

■ Power dissipation and efficiency

Hypothesis :

• Voltage and current in the load are sinusoidal

(Vout and Iout)

• Supply voltage is a pure DC source (Vcc)

Regarding the load we have :

VO UT = VPEAK sin ω t (V)

and

IOUT = -V----OR----U-L---T--- (A)

Vout1 = –Vin R-----f-R-e---i-e-n---d---- (V)

For the second stage : Vout2 = -Vout1 (V)

and

PO UT = V-----P--2-E--R--A---LK----2--- (W)

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