TS4890 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
TS4890 Datasheet PDF : 32 Pages
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TS4890
Fig. 105 : SO8 & MiniSO8 Demoboard Top
Solder Layer
The output power is :
Pout = (2 VoutRMS)2 (W)
RL
For the same power supply voltage, the output
power in BTL configuration is four times higher
than the output power in single ended
configuration.
s Gain In Typical Application Schematic
(cf. page 1)
In flat region (no effect of Cin), the output voltage
of the first stage is :
Vout1 = −Vin Rfeed (V)
Rin
Fig. 106 : SO8 & MiniSO8 Demoboard Bottom
Solder Layer
For the second stage : Vout2 = -Vout1 (V)
The differential output voltage is
Vout2 − Vout1 = 2 Vin Rfeed (V)
Rin
The differential gain named gain (Gv) for more
convenient usage is :
Gv = Vout2 − Vout1 = 2 Rfeed
Vin
Rin
s BTL Configuration Principle
The TS4890 is a monolithic power amplifier with a
BTL output type. BTL (Bridge Tied Load) means
that each end of the load are connected to two
single ended output amplifiers. Thus, we have :
Single ended output 1 = Vout1 = Vout (V)
Single ended output 2 = Vout2 = -Vout (V)
And Vout1 - Vout2 = 2Vout (V)
Remark : Vout2 is in phase with Vin and Vout1 is
180 phased with Vin. It means that the positive
terminal of the loudspeaker should be connected
to Vout2 and the negative to Vout1.
s Low and high frequency response
In low frequency region, the effect of Cin starts.
Cin with Rin forms a high pass filter with a -3dB cut
off frequency .
FCL
=
1
2πRinCin
(Hz)
In high frequency region, you can limit the
bandwidth by adding a capacitor (Cfeed) in
parallel on Rfeed. Its form a low pass filter with a
-3dB cut off frequency .
FCH
=
2π
1
Rfeed
Cfeed
(Hz)
24/32
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