ADSP-21061LASZ-176 View Datasheet(PDF) - Analog Devices
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Description
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ADSP-21061LASZ-176 Datasheet PDF : 52 Pages
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ADSP-21061/ADSP-21061L
Multiprocessor Bus Request and Host Bus Request
Use these specifications for passing of bus mastership between
multiprocessing ADSP-21061s (BRx) or a host processor, both
synchronous and asynchronous (HBR, HBG).
Table 16. Multiprocessor Bus Request and Host Bus Request
5 V and 3.3 V
Parameter
Min
Max
Unit
Timing Requirements
tHBGRCSV
tSHBRI
tHHBRI
HBG Low to RD/WR/CS Valid1
HBR Setup Before CLKIN2
HBR Hold After CLKIN2
tSHBGI
HBG Setup Before CLKIN
tHHBGI
tSBRI
HBG Hold After CLKIN High
BRx, CPA Setup Before CLKIN3
tHBRI
BRx, CPA Hold After CLKIN High
tSRPBAI
RPBA Setup Before CLKIN
tHRPBAI
RPBA Hold After CLKIN
Switching Characteristics
20 + 3DT/4
13 + DT/2
13 + DT/2
20 + 3DT/4
20 + 5DT/4
ns
ns
14 + 3DT/4
ns
ns
6 + DT/2
ns
ns
6 + DT/2
ns
ns
12 + 3DT/4
ns
tDHBGO
tHHBGO
tDBRO
tHBRO
tDCPAO
tTRCPA
tDRDYCS
tTRDYHG
tARDYTR
HBG Delay After CLKIN
HBG Hold After CLKIN
BRx Delay After CLKIN
BRx Hold After CLKIN
CPA Low Delay After CLKIN4
CPA Disable After CLKIN
REDY (O/D) or (A/D) Low from CS and HBR Low5, 6
REDY (O/D) Disable or REDY (A/D) High from HBG5, 7
REDY (A/D) Disable from CS or HBR High5
7 – DT/8
ns
–2 – DT/8
ns
5.5 – DT/8
ns
–2 – DT/8
ns
6.5 – DT/8
ns
–2 – DT/8
4.5 – DT/8
ns
8
ns
44 + 27DT/16
ns
10
ns
1 For first asynchronous access after HBR and CS asserted, ADDR31-0 must be a non-MMS value 1/2 tCK before RD or WR goes low or by tHBGRCSV after HBG goes low. This is
easily accomplished by driving an upper address signal high when HBG is asserted. See the “Host Processor Control of the ADSP-21061” section in the ADSP-2106x SHARC
User’s Manual.
2 Only required for recognition in the current cycle.
3 CPA assertion must meet the setup to CLKIN; deassertion does not need to meet the setup to CLKIN.
4 For the ADSP-21061L (3.3 V), this specification is 8.5 – DT/8 ns max.
5 (O/D) = open drain, (A/D) = active drive.
6 For the ADSP-21061L (3.3 V), this specification is 12 ns max.
7 For the ADSP-21061L (3.3 V), this specification is 40 + 23DT/16 ns min.
Rev. D | Page 30 of 52 | May 2013
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