PIC18F010/020
FIGURE 15-10: TIMER0 EXTERNAL CLOCK TIMINGS
RB2/T0CKI
TMR0
40
41
42
48
Note: Refer to Figure 15-5 for load conditions.
TABLE 15-7: TIMER0 EXTERNAL CLOCK REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ† Max Units Conditions
40*
Tt0H T0CKI High Pulse Width No Prescaler
0.5TCY + 5 — — ns Must also meet
With Prescaler
10
— — ns parameter 42
41*
Tt0L T0CKI Low Pulse Width No Prescaler
0.5TCY + 5 — — ns Must also meet
With Prescaler
10
— — ns parameter 42
42*
Tt0P T0CKI Period
No Prescaler
TCY + 10
— — ns
With Prescaler Greater of: — — ns N = prescale value
20 or TCY + 20
(2, 4, ..., 256)
N
48 TCKEZtmr1 Delay from external clock edge to timer
2Tosc
— 7Tosc —
increment
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
DS41142A-page 156
Preliminary
2001 Microchip Technology Inc.