PIC16C925T-S/CL View Datasheet(PDF) - Microchip Technology
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Description
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PIC16C925T-S/CL Datasheet PDF : 182 Pages
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2.3.5 PIR1 REGISTER
This register contains the individual flag bits for the
peripheral interrupts.
PIC16C925/926
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
REGISTER 2-5:
PIR1 REGISTER (ADDRESS 0Ch)
R/W-0
R/W-0
U-0
U-0
LCDIF
ADIF
—
—
bit 7
R/W-0
SSPIF
R/W-0 R/W-0
CCP1IF TMR2IF
R/W-0
TMR1IF
bit 0
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
LCDIF: LCD Interrupt Flag bit
1 = LCD interrupt has occurred (must be cleared in software)
0 = LCD interrupt did not occur
ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
Unimplemented: Read as ‘0’
SSPIF: Master Synchronous Serial Port Interrupt Flag bit
1 = The transmission/reception is complete (must be cleared in software)
0 = Waiting to transmit/receive
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare mode:
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM mode:
Unused in this mode
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
Legend:
R = Readable bit
- n = Value at POR reset
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
x = Bit is unknown
2001 Microchip Technology Inc.
Preliminary
DS39544A-page 23
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