PIC16C925T-S/CL View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16C925T-S/CL Datasheet PDF : 182 Pages
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PIC16C925/926
4.7 PORTG and TRISG Register
PORTG is a digital input only port. Each pin is multi-
plexed with an LCD segment driver. These pins have
Schmitt Trigger input buffers.
Note 1: On a Power-on Reset, these pins are
configured as LCD segment drivers.
2: To configure the pins as a digital port, the
corresponding bits in the LCDSE register
must be cleared. Any bit set in the LCDSE
register overrides any bit settings in the
corresponding TRIS register.
EXAMPLE 4-7:
BCF STATUS,
BSF STATUS,
BCF LCDSE,
BCF LCDSE,
INITIALIZING PORTG
RP0
RP1
SE27
;Select Bank2
;
;Make all PORTG
SE20 ;and PORTE<7>
;digital inputs
FIGURE 4-9:
LCD
Segment Data
LCD Segment
Output Enable
PORTG BLOCK DIAGRAM
LCD
Common Data
LCD Common
Output Enable
LCDSE<n>
Digital Input/
LCD Output pin
Data Bus
RD Port
Q
D
ENEN
Schmitt
Trigger
Input
Buffer
VDD
RD TRIS
TABLE 4-13: PORTG FUNCTIONS
Name
Bit# Buffer Type
RG0/SEG20
bit0
ST
RG1/SEG21
bit1
ST
RG2/SEG22
bit2
ST
RG3/SEG23
bit3
ST
RG4/SEG24
bit4
ST
RG5/SEG25
bit5
ST
RG6/SEG26
bit6
ST
RG7/SEG28
bit7
ST
Legend: ST = Schmitt Trigger input
Function
Digital input or Segment Driver20.
Digital input or Segment Driver21.
Digital input or Segment Driver22.
Digital input or Segment Driver23.
Digital input or Segment Driver24.
Digital input or Segment Driver25.
Digital input or Segment Driver26.
Digital input or Segment Driver28 (not available on 64-pin devices).
TABLE 4-14: SUMMARY OF REGISTERS ASSOCIATED WITH PORTG
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3
108h
PORTG RG7 RG6 RG5 RG4 RG3
188h
TRISG PORTG Data Direction Control Register
10Dh LCDSE SE29 SE27 SE20 SE16 SE12
Legend: Shaded cells are not used by PORTG.
Bit 2
RG2
SE9
Bit 1
RG1
SE5
Bit 0
RG0
SE0
Value on
Power-on
Reset
Value on all
other
RESETS
0000 0000
1111 1111
1111 1111
0000 0000
1111 1111
1111 1111
DS39544A-page 38
Preliminary
2001 Microchip Technology Inc.
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