Z8018533FSC View Datasheet(PDF) - Zilog

Part Name

Description

Manufacturer

Z8018533FSC

SMART PERIPHERAL CONTROLLERS

Zilog 

Zilog

PRELIMINARY

Z80185/Z80195

SMART PERIPHERAL CONTROLLES

IDLE Mode

IDLE mode is another power-down mode offered by the

Z8S180. To enter IDLE mode:

1. Set D6 and D3 to 0 and 1, respectively.

2. Set the I/O STOP bit (D5 of ICR,

I/O Address = 3FH) to 1.

Standby-Quick Recovery Mode

STANDBY-QUICK RECOVERY mode is an option offered

in STANDBY mode to reduce the clock recovery time in

STANDBY mode from 217 clock cycles (6.5 ms at 20 MHz)

to 26 clock cycles (3.2 µs at 20 MHz). This feature can only

be used when providing an oscillator as clock source.

To enter STANDBY-QUICK RECOVERY mode:

3. Execute the SLEEP instruction.

1. Set D6 and D3 to 1 and 1, respectively.

When the part is in IDLE mode, the clock oscillator is kept

oscillating, but the clock to the rest of the internal circuit,

including the CLKOUT, is stopped completely. IDLE mode

is exited in a similar way as STANDBY mode, in other

words, RESET, BUS REQUEST or EXTERNAL INTER-

RUPTS, except that the 217 bit wake-up timer is bypassed;

all control signals are asserted eight clock cycles after the

exit conditions are gathered.

2. Set the I/O STOP bit (D5 of ICR,

I/O Address = 3FH) to 1.

3. Execute the SLEEP instruction.

When the part is in STANDBY-QUICK RECOVERY mode,

the operation is identical to STANDBY mode except when

exit conditions are gathered, in other words, RESET, BUS

REQUEST or EXTERNAL INTERRUPTS. The clock and

other control signals are recovered sooner than the

STANDBY mode.

Note: If STANDBY-QUICK RECOVERY is enabled, the

user must make sure stable oscillation is obtained within

64 clock cycles.

DS971850301

35

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