ADSP-21060LC(RevH) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADSP-21060LC Datasheet PDF : 64 Pages
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ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC
Serial Ports
For serial ports, see Table 28, Table 29, Table 30, Table 31,
Table 32, Table 33, Table 35, Figure 26, and Figure 25. To deter-
mine whether communication is possible between two devices
at clock speed n, the following specifications must be confirmed:
1) frame sync delay and frame sync setup and hold, 2) data delay
and data setup and hold, and 3) SCLK width.
Table 28. Serial Ports—External Clock
5 V and 3.3 V
Parameter
Min
Max
Timing Requirements
tSFSE
TFS/RFS Setup Before TCLK/RCLK1
3.5
tHFSE
TFS/RFS Hold After TCLK/RCLK1, 2
4
tSDRE
Receive Data Setup Before RCLK1
1.5
tHDRE
Receive Data Hold After RCLK1
6.5
tSCLKW
TCLK/RCLK Width3
9
tSCLK
TCLK/RCLK Period
tCK
1 Referenced to sample edge.
2 RFS hold after RCK when MCE = 1, MFD = 0 is 0 ns minimum from drive edge. TFS hold after TCK for late external TFS is 0 ns minimum from drive edge.
3 For ADSP-21060/ADSP-21060C/ADSP-21060LC, specification is 9.5 ns min.
Unit
ns
ns
ns
ns
ns
ns
Table 29. Serial Ports—Internal Clock
5 V and 3.3 V
Parameter
Min
Max
Timing Requirements
tSFSI
TFS Setup Before TCLK1; RFS Setup Before RCLK1
8
tHFSI
TFS/RFS Hold After TCLK/RCLK1, 2
1
tSDRI
Receive Data Setup Before RCLK1
3
tHDRI
Receive Data Hold After RCLK1
3
1 Referenced to sample edge.
2 RFS hold after RCK when MCE = 1, MFD = 0 is 0 ns minimum from drive edge. TFS hold after TCK for late external TFS is 0 ns minimum from drive edge.
Unit
ns
ns
ns
ns
Table 30. Serial Ports—External or Internal Clock
Parameter
Switching Characteristics
tDFSE
tHOFSE
RFS Delay After RCLK (Internally Generated RFS)1
RFS Hold After RCLK (Internally Generated RFS)1
1 Referenced to drive edge.
5 V and 3.3 V
Min
Max
Unit
13
ns
3
ns
Table 31. Serial Ports—External Clock
Parameter
Switching Characteristics
tDFSE
tHOFSE
tDDTE
tHDTE
TFS Delay After TCLK (Internally Generated TFS)1
TFS Hold After TCLK (Internally Generated TFS)1
Transmit Data Delay After TCLK1
Transmit Data Hold After TCLK1
1 Referenced to drive edge.
5 V and 3.3 V
Min
Max
Unit
13
ns
3
ns
16
ns
5
ns
Rev. H | Page 43 of 64 | March 2013
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