STLC1502
nous and cannot be stopped.
The memory banks are swapped between them on PCM frame basis; so while the incoming information is writ-
ten in the on-line memory, the D950 can read the information contained in the previous PCM frame from the off-
line memory bank. Every PCM frame (FS signal based) the on-line memory becomes off-line and viceversa.
This swap is transparent for the D950 so that the D950 sees the two memory banks located always at the same
addresses.
The same scheme in a different hardware block implements the memory buffer for the downstream flow (from
the D950 to the codec).
10.6 Basic Operation
The PCM block uses the reference clock to generate an internal time base. For example, it generates the FS
signal with the proper timing. Then an internal register has to store the association between the voice channel
(SLIC) and the PCM slots according to the configuration of the codec (DRA# and DXA# registers). The FS signal
is sent not only to the codec, but also to the D950 (through ITR7), in order to give it the proper timing reference.
So, between two subsequent FS signals, the D950 has to read back from the PCM block the voice samples of
the previous PCM frame and has to write in it the PCM samples of the several voice channels that the PCM
block itself will send to the codec in the following PCM frame.
So the ITR7 is an 8Khz interrupt signal that provides the timing reference to the D950.
10.7 PCM coding Voice Frame
This section describes the operation of the PCM block in case of PCM coding of the voice samples (LIN bit of
the codec CONF register set to 0x0). In this case each voice sample has 8 bits, plus 3 miscellaneous bits per
channel. So a total of 2 direction x 2 banks x 4 channels x 11 bits each (176 bits) are needed. This memory is
implemented internally in the PCM block.
The PCM_VOICE_FRAME_FROM_CODEC_x (x=0..3) and the PCM_VOICE_FRAME_TO_CODEC_x
(x=0..3) are used to store upstream and downstream voice channel x.
Selection between PCM and linear coding is done in the PCM_CONFIGURATION register
PCM Coding Upstream Basic Operation (from the codec to the D950)
The PCM voice samples coming from the codec are inserted in the on-line upstream memory. In the same PCM
slot, the D950 accesses at the off-line upstream memory through the PCM_VOICE_FRAME_FROM_CODEC_x
register connected to off-line memory. If during a PCM frame, the D950 left some unread voice data in the off-
line memory (in the meantime became on-line) an interrupt even is generated (OV_U bit of the
PCM_INTERRUPT register).
10.8 Linear coding Voice Frame
If the linear coding (LIN bit of the codec CONF register set to 0x1) is selected, each voice sample is coded as
a 16 bit two’s complement. This means that each voice channel takes two PCM slot to transport the voice infor-
mation. For example, considering the channel x (x=0..3), for the upstream flow (voice sample from the codec to
the D950), the 8 most significant bits are transported in the PCM slot reported in the PCM_SLOT_UP field of
the PCM_SLOT_FROM_CODEC_x register while 8 less significant bits are transported in the following At reset
PCM_LIN_DATA_DOWN=0x0000.
x values: 0..3.
10.9 PCM Register List
This section reports the list of the PCM block registers in the D950 domain. The address is referred to the base
address where the PCM block is placed on. In other words, they are displacement addresses. The D950 cannot
70/81