STPCI2(2002) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STPCI2
(Rev.:2002)

X86 Core PC Compatible System-on-Chip for Terminals

STMicroelectronics 

DESIGN GUIDELINES

Figure 6-22. DIMM placement

35mm

STPC

SDRAM I/F

DIMM2

DIMM1

116mm

35mm

15mm

10mm

memory clock input (MCLKI) and any other

component using the memory clock are

individually driven from a low skew clock driver

with matched routing lengths. In other words, all

clock line lengths that go from the buffer to the

memory chips (MCLKx) and from the buffer to the

STPC (MCLKI) must be identical.

This is shown in Figure 6-23.

Figure 6-23. Clock Routing

Low skew clock driver:

L

DIMM CKn input

MCLKO

DIMM CKn input

DIMM CKn input

L+75mm*

20pF

STPC MCLKI

* No additional 75mm when SDRAM directly soldered on board

94/111

Issue 1.0 - July 24, 2002

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