STPCI2 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STPCI2

X86 CORE PC COMPATIBLE SYSTEM-ON-CHIP FOR TERMINALS

STMicroelectronics 

STPC® ATLAS

Table 2-2. Definition of Signal Pins

Signal Name

Dir

Buffer Type1

Description

Qty

FCS_0H#

O BD8STRP_FT

Upper half Bank 0 Flash Chip Select

1

FCS_0L#

O BD8STRP_FT

Lower half Bank 0 Flash Chip Select

1

FCS_1H#

O BD8STRP_FT

Upper half Bank 1 Flash Chip Select

1

FCS_1L#

O BD8STRP_FT

Lower half Bank 1 Flash Chip Select

1

IRQ_MUX[3:0]1

I/O BD4STRP_FT

Muxed Interrupt Lines

4

IDE CONTROLLER

DD[15:12]

I/O BD4STRP_FT

Data Bus

4

DD[11:0]

I/O BD8STRUP_FT

Data Bus

12

DA[2:0]

O BD8STRUP_FT

Address Bus

3

PCS1, PCS3

O BD8STRUP_FT

Primary Chip Selects

2

SCS1, SCS3

O BD8STRUP_FT

Secondary Chip Selects

2

DIORDY

O BD8STRUP_FT

Data I/O Ready

1

PIRQ/SIRQ

I BD4STRP_FT

Primary / Secondary Interrupt Request

2

PDRQ/SDRQ

I BD4STRP_FT

Primary / Secondary DMA Request

2

PDACK#/SDACK# O BD8STRP_FT

Primary / Secondary DMA Acknowledge

2

t(s) PDIOR#/SDIOR#

O BD8STRUP_FT

Primary / Secondary IO Read

2

PDIOW#/SDIOW# O BD8STRP_FT

Primary / Secondary IO Write

2

uc VGA CONTROLLER

d RED, GREEN, BLUE O VDDCO

Red, Green, Blue

3

ro VSYNC, HSYNC

I/O BD4STRP_FT

Vertical & Horizontal Synchronisations

2

P VREF_DAC

I ANA

DAC Voltage reference

1

te RSET

I ANA

Resistor Set

1

COMP

I ANA

Compensation

1

le COL_SEL

O BD4STRP_FT

Colour Select

1

so I2C INTERFACE

b SCL / DDC[1]

I/O BD4STRUP_FT

I²C Interface - Clock / VGA DDC[1]

1

O SDA / DDC[0]

I/O BD4STRUP_FT

I²C Interface - Data / VGA DDC[0]

1

t(s) - TFT INTERFACE

TFTR[5:2]

O BD4STRP_TC

Red

4

c TFTR[1:0]

O BD4STRP_FT

Red

2

u TFTG[5:2]

O BD4STRP_TC

Green

4

d ,TFTG[1:0]

O BD4STRP_FT

Green

2

ro TFTB[5:2]

O BD4STRP_TC

Blue

4

P TFTB[1:0]

O BD4STRP_FT

Blue

2

TFTLINE

O BD8STRP_TC

Horizontal Sync

1

te TFTFRAME

O BD4STRP_TC

Vertical Sync

1

le TFTDE

O BD4STRP_TC

Data Enable

1

o TFTENVDD,

s TFTENVCC

O BD4STRP_TC

Enable Vdd & Vcc of flat panel

2

ObTFTPWM

O BD8STRP_TC

PWM back-light control

1

TFTDCLK

O BT8TRP_TC

Dot clock for Flat Panel

1

VIDEO INPUT PORT

VCLK

I/O BD8STRP_FT

27-33 MHz Video Input Port Clock

1

VIN[7:0]

I BD4STRP_FT

Video Input Data Bus

8

ODD_EVEN#

I/O BD4STRP_FT

Video Input Odd/even Field

1

VCS

I/O BD4STRP_FT

Video Input Horizontal Sync

1

Note1; See Table 2-3 for buffer type descriptions

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