STPCC01 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STPCC01

PC Compatible Embeded Microprocessor

STMicroelectronics 

PIN DESCRIPTION

Table 2-2. Definition of Signal Pins

Signal Name

Dir

Description

Qty

ISA/IDE COMBINED CONTROL

IOCHRDY / DIORDY

I/O I/O Channel Ready (ISA) - Busy/Ready (IDE)

1

ISA CONTROL

OSC14M

O ISA bus synchronisation clock

1

ALE

O Address Latch Enable

1

BHE#

I/O System Bus High Enable

1

MEMR#, MEMW#

I/O Memory Read and Memory Write

2

SMEMR#, SMEMW#

O System Memory Read and Memory Write

2

IOR#, IOW#

I/O I/O Read and Write

2

MASTER#

I Add On Card Owns Bus

1

MCS16#, IOCS16#

I Memory/IO Chip Select16

2

REF#

O Refresh Cycle.

1

AEN

O Address Enable

1

ZW S#

I Zero Wait State

1

IO CHCK#

I I/O Channel Check.

1

ISAOE#

O Bidirectional OE Control

1

RTCAS#

O Real Time Clock Address Strobe

1

GPIOCS#

I/O General Purpose Chip Select

1

IDE CONTROL

PIRQ

I Primary Interrupt Request

1

SIRQ

I Secondary Interrupt Request

1

PDRQ

I Primary DMA Request

1

SDRQ

I Secondary DMA Request

1

PDACK#

O Primary DMA Acknowledge

1

SDACK#

O Secondary DMA Acknowledge

1

PIOR#

I/O Primary I/O Read

1

PIOW#

O Primary I/O Write

1

SIOR#

I/O Secondary I/O Read

1

SIOW#

O Secondary I/O Write

1

IPC

IRQ_MUX[3:0]

I Multiplexed Interrupt Request

4

DREQ_MUX[1:0]

I Multiplexed DMA Request

2

DACK_ENC[2:0]

O DMA Acknowledge

3

TC

O ISA Terminal Count

1

MONITOR INTERFACE

RED, GREEN, BLUE

VSYNC

HSYNC

VREF_DAC

RSET

COMP

DDC[1:0]

SCL / DDC[1]

O Red, Green, Blue

3

O Vertical Sync

1

O Horizontal Sync

1

I DAC Voltage reference

1

I Resistor Set

1

I Compensation

1

I/O Display Data Channel Serial Link

2

I/O I C Interface - Clock / Can be used for VGA DDC[1] signal

1

12/51

Issue 1.2

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