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STPCE1EDBI View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
STPCE1EDBI Datasheet PDF : 87 Pages
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DESIGN GUIDELINES
6.3.9. JTAG INTERFACE
The STPC integrates a JTAG interface for scan-
chain and on-board testing. The only external
Figure 6-14. Typical JTAG implementation
device needed are the pull up resistors. Figure 6-
14 describes a typical implementation using these
devices.
TCLK
TDO
TMS
TDI
TRST
STPC
3V3 3V3 3V3 3V3
Connector
10 9
87
65
43
21
70/87
Release 1.3 - January 29, 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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