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STPCE1EDBC View Datasheet(PDF) - STMicroelectronics

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STPCE1EDBC Datasheet PDF : 87 Pages
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DESIGN GUIDELINES
As the PCB acts as a heat sink, the layout of top
and ground layers must be done with care to
maximize the board surface dissipating the heat.
The only limitation is the risk of losing routing
channels. Figure 6-29 and Figure 6-30 show a
routing with a good thermal dissipation thanks to
an optimized placement of power and signal vias.
The ground plane should be on bottom layer for
the best heat spreading (thicker layer than internal
ones) and dissipation (direct contact with air). .
Figure 6-29. Layout for Good Thermal Dissipation - top layer
1
A
STPC ball
Via
Not Connected ball
GND ball
3.3V ball
2.5V ball (Core / PLLs)
80/87
Release 1.3 - January 29, 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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