CL-PS7500FE
System-on-a-Chip for Internet Appliance
VIRTUAL ADDRESS
SECTION
TRANSLATION
FAULT
INVALID
SECTION
DOMAIN
FAULT
NO ACCESS (‘00’)
RESERVED (‘10’)
CHECK ADDRESS ALIGNMENT
MISALIGNED
ALIGNMENT
FAULT
GET LEVEL ONE DESCRIPTOR
SECTION
PAGE
GET PAGE
TABLE ENTRY
CHECK DOMAIN STATUS
SECTION
PAGE
INVALID
PAGE
TRANSLATION
FAULT
NO ACCESS (‘00’)
RESERVED (‘10’)
PAGE
DOMAIN
FAULT
SECTION
PERMISSION
FAULT
VIOLATION
CLIENT(‘01’)
CLIENT(‘01’)
MANAGER(‘11’)
CHECK ACCESS
PERMISSIONS
CHECK ACCESS
PERMISSIONS
VIOLATION
SUB-PAGE
PERMISSION
FAULT
PHYSICAL ADDRESS
Figure 6-10. Sequence for Checking Faults
6.10.1 Alignment Fault
When Alignment fault is enabled (bit 1 in Control register is set), the MMU generates an Alignment fault
on any data word access where the address is not word-aligned irrespective of whether the MMU is
enabled or not; in other words, if either of virtual address bits 1:0 are not ‘0’.
An Alignment fault is not generated on any instruction fetch or on any byte access. Note that if the access
generates an Alignment fault, the access sequence aborts without reference to further permission
checks.
June 1997
ADVANCE DATA BOOK v2.0
49
ARM PROCESSOR MMU