PIC16F882-I/SPQTP View Datasheet(PDF) - Microchip Technology
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PIC16F882-I/SPQTP Datasheet PDF : 338 Pages
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PIC16F882/883/884/886/887
11.6.7.1 Steering Synchronization
The STRSYNC bit of the PSTRCON register gives the
user two selections of when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRCON register. In this case, the
output signal at the P1<D:A> pins may be an
incomplete PWM waveform. This operation is useful
when the user firmware needs to immediately remove
a PWM signal from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
Figures 11-20 and 11-21 illustrate the timing diagrams
of the PWM steering depending on the STRSYNC
setting.
FIGURE 11-20: EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
PWM
PWM Period
STRn
P1<D:A>
PORT Data
P1n = PWM
PORT Data
FIGURE 11-21:
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STRSYNC = 1)
PWM
STRn
P1<D:A>
PORT Data
P1n = PWM
PORT Data
DS41291G-page 152
2006-2012 Microchip Technology Inc.
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