STM32F103V8H6TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F103V8H6TR

Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 com. interfaces

STMicroelectronics 

Electrical characteristics

STM32F103xC, STM32F103xD, STM32F103xE

Synchronous waveforms and timings

Figure 28 through Figure 31 represent synchronous waveforms and Table 36 through

Table 38 provide the corresponding timings. The results shown in these tables are obtained

with the following FSMC configuration:

● BurstAccessMode = FSMC_BurstAccessMode_Enable;

● MemoryType = FSMC_MemoryType_CRAM;

● WriteBurst = FSMC_WriteBurst_Enable;

● CLKDivision = 1; (0 is not supported, see the STM32F10xxx reference manual)

● DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM

Figure 28. Synchronous multiplexed NOR/PSRAM read timings

tw(CLK)

FSMC_CLK

tw(CLK)

BUSTURN = 0

FSMC_NEx

td(CLKL-NADVL)

FSMC_NADV

FSMC_A[25:16]

Data latency = 1

td(CLKL-NExL)

td(CLKL-NADVH)

td(CLKL-AV)

td(CLKH-NExH)

td(CLKH-AIV)

td(CLKL-NOEL)

td(CLKH-NOEH)

FSMC_NOE

td(CLKL-ADV)

FSMC_AD[15:0]

td(CLKL-ADIV)

tsu(ADV-CLKH)

AD[15:0]

tsu(NWAITV-CLKH)

th(CLKH-ADV)

tsu(ADV-CLKH)

D1

D2

th(CLKH-ADV)

th(CLKH-NWAITV)

FSMC_NWAIT

(WAITCFG = 1b, WAITPOL + 0b)

FSMC_NWAIT

(WAITCFG = 0b, WAITPOL + 0b)

tsu(NWAITV-CLKH)

th(CLKH-NWAITV)

tsu(NWAITV-CLKH)

th(CLKH-NWAITV)

ai14893e

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Doc ID 14611 Rev 7

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