Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
Table 46. Output voltage characteristics
Symbol
Parameter
Conditions
Min
Max Unit
VOL(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
TTL port
0.4
IIO = +8 mA
V
VOH(2)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2.7 V < VDD < 3.6 V VDD–0.4
VOL (1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
CMOS port
IIO =+ 8mA
VOH (2)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2.7 V < VDD < 3.6 V
2.4
0.4
V
VOL(1)(3)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
IIO = +20 mA
1.3
V
VOH(2)(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2.7 V < VDD < 3.6 V VDD–1.3
VOL(1)(3)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
IIO = +6 mA
0.4
V
VOH(2)(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2 V < VDD < 2.7 V VDD–0.4
1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 8
and the sum of IIO (I/O ports and control pins) must not exceed IVSS.
2. The IIO current sourced by the device must always respect the absolute maximum rating specified in
Table 8 and the sum of IIO (I/O ports and control pins) must not exceed IVDD.
3. Based on characterization data, not tested in production.
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